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    <title>Vybrid ProcessorsのトピックRe: Reset safe scratch registers</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Reset-safe-scratch-registers/m-p/757798#M5889</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andreas,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 15px; font-family: arial, helvetica, sans-serif;"&gt;The low-power (battery-backed) section incorporates a secure real time counter, a monotonic counter, and a general-purpose register. This portion of the block is powered by a battery that maintains the state of the SNVS_LP registers when the chip is powered off.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 15px; font-family: arial, helvetica, sans-serif;"&gt;Please take a look to &lt;/SPAN&gt;&lt;STRONG&gt;Chapter 7SNVS, Reset, eFuse, and Boot &lt;/STRONG&gt;of Reference Manual.&lt;STRONG&gt;&lt;BR /&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf" title="https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf"&gt;https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Carlos&lt;BR /&gt;NXP Technical Support&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 14 Mar 2018 00:05:25 GMT</pubDate>
    <dc:creator>Carlos_Musich</dc:creator>
    <dc:date>2018-03-14T00:05:25Z</dc:date>
    <item>
      <title>Reset safe scratch registers</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Reset-safe-scratch-registers/m-p/757797#M5888</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ,&lt;/P&gt;&lt;P&gt;I would like to implement a boot counter in u-boot, therefore I would need some register where i can keep the boot counter value. This value shall not be reseted after a HW reset.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Usecase: System cold boots, bootcounter increased by one, try to boot Linux, successful reset this counter.&lt;/P&gt;&lt;P&gt;If Linux panics on boot up, watchdog interrupts, u-boot boots again bootcounter ++;&lt;/P&gt;&lt;P&gt;If countervalue is e.g. &amp;gt; 4 then load alternative Linux.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Are there any registers on the vf6 cpu that are "reset save" and could be used for this usecase?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanx a lot, Andi&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jan 2018 16:38:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Reset-safe-scratch-registers/m-p/757797#M5888</guid>
      <dc:creator>andreweipel</dc:creator>
      <dc:date>2018-01-25T16:38:18Z</dc:date>
    </item>
    <item>
      <title>Re: Reset safe scratch registers</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Reset-safe-scratch-registers/m-p/757798#M5889</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andreas,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 15px; font-family: arial, helvetica, sans-serif;"&gt;The low-power (battery-backed) section incorporates a secure real time counter, a monotonic counter, and a general-purpose register. This portion of the block is powered by a battery that maintains the state of the SNVS_LP registers when the chip is powered off.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 15px; font-family: arial, helvetica, sans-serif;"&gt;Please take a look to &lt;/SPAN&gt;&lt;STRONG&gt;Chapter 7SNVS, Reset, eFuse, and Boot &lt;/STRONG&gt;of Reference Manual.&lt;STRONG&gt;&lt;BR /&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf" title="https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf"&gt;https://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Carlos&lt;BR /&gt;NXP Technical Support&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2018 00:05:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Reset-safe-scratch-registers/m-p/757798#M5889</guid>
      <dc:creator>Carlos_Musich</dc:creator>
      <dc:date>2018-03-14T00:05:25Z</dc:date>
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