Vybrid Processorsのトピックworkaround for e8052 (RMII)

workaround for e8052 (RMII)

eishishibusawa — Mon, 16 Apr 2018 05:11:25 GMT

Dear Sir

I want to ask the workaround for e8052.

It is described at 12.3.0.2 Internal RMII reference clock in VYBRIDHDUG Rev.1.

I want to confirm the workaround based on "EXTERNAL CLOCK SOURCE" scheme.

Q1.

Can I select the CKO1 or CKO2 pin for the clock_Out pin(Fig42)?

Q2.

Are there any problem to select the PLL5 for clock source of the clock_Out(Fig42)?

Best Regards,

Eishi SHIBUSAWA,

Re: workaround for e8052 (RMII)

Yuri — Fri, 20 Apr 2018 06:04:19 GMT

Hello,

Yes, it is possible to use one of CKOs, sourced with the PLL5, for the clock_Out.

Have a great day,
Yuri

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