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    <title>topic Bare metal example using SPI in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640099#M5767</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is there a bare metal example for VF61 that shows how to use SPI in master mode?&lt;/P&gt;&lt;P&gt;I'm interested in having a frame of 24 bits; according to the VFxxx Reference Manual&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;SPI frames longer than 16 bits can be supported using the continuous selection format.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Is there an example that shows this feature?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 25 Jan 2017 11:14:40 GMT</pubDate>
    <dc:creator>vix</dc:creator>
    <dc:date>2017-01-25T11:14:40Z</dc:date>
    <item>
      <title>Bare metal example using SPI</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640099#M5767</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is there a bare metal example for VF61 that shows how to use SPI in master mode?&lt;/P&gt;&lt;P&gt;I'm interested in having a frame of 24 bits; according to the VFxxx Reference Manual&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;SPI frames longer than 16 bits can be supported using the continuous selection format.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Is there an example that shows this feature?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 25 Jan 2017 11:14:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640099#M5767</guid>
      <dc:creator>vix</dc:creator>
      <dc:date>2017-01-25T11:14:40Z</dc:date>
    </item>
    <item>
      <title>Re: Bare metal example using SPI</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640100#M5768</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Vix,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can take a look to the BareMetal examples available in the following web page, there is a QSPI driver, that you may use.&lt;/P&gt;&lt;P&gt;&lt;A class="" href="http://www.nxp.com/webapp/sps/download/license.jsp?colCode=VYBRID_SAMPLE_CODE_SBCH&amp;amp;Parent_nodeId=1331067829166697116630&amp;amp;Parent_pageType=product" title="http://www.nxp.com/webapp/sps/download/license.jsp?colCode=VYBRID_SAMPLE_CODE_SBCH&amp;amp;Parent_nodeId=1331067829166697116630&amp;amp;Parent_pageType=product"&gt;Sample Code for Vybrid Controller Tower System&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a nice day sir!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Feb 2017 13:36:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640100#M5768</guid>
      <dc:creator>jamesbone</dc:creator>
      <dc:date>2017-02-02T13:36:49Z</dc:date>
    </item>
    <item>
      <title>Re: Bare metal example using SPI</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640101#M5769</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I looked to the QSPI example, and modified it to work with SPI0.&lt;/P&gt;&lt;P&gt;I enabled the clock CCM_CCGR0_CG12 and set the IOMUXC PTB19, PTB20, PTB21 and PTB22 but connecting an oscilloscope, the pins are not driven at all.&lt;/P&gt;&lt;P&gt;Is there any additional configuration needed?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 Feb 2017 11:03:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Bare-metal-example-using-SPI/m-p/640101#M5769</guid>
      <dc:creator>vix</dc:creator>
      <dc:date>2017-02-06T11:03:29Z</dc:date>
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