topic Re: Vybrid multiple resets in Vybrid Processors

Vybrid multiple resets

shouminliu — Thu, 09 Mar 2017 00:14:50 GMT

We use the KVF61NS152CMK50, but only the A5 core is used. We observed some very strange behavior on the reset line after a short 3.3V dip – see attached.

Blue trace is 3.3V, Yellow is /RESET

The /RESET line is connected to the output of MCU supervisor MCP130. That circuit is attached as well.

What would be the reason for multiple resets after a brief loss of 3.3V power? Thank you.

Re: Vybrid multiple resets

Pavel — Wed, 22 Mar 2017 04:59:49 GMT

It looks like that 3.3V is incorrect on your board. Your oscilloscope diagram shows that there is about 3.0V on your board. The MPC130 generates RESET since 3.3V is incorrect.

Check power supply on your board.

Have a great day,
Pavel Chubakov

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Re: Vybrid multiple resets

shouminliu — Fri, 24 Mar 2017 02:41:57 GMT

Pavel,

Thank you for the comment. The 3.3V rail actually is in spec. Please refer to the attached screenshot. 3.3V did not go all the way down to ground (0V) before it came back up to 3.3V. Would this cause any problems?

We have also observed that if 3.3V remains low for 1 second or so, Vybrid can be reset correctly and everything works fine. Is there a requirement that 3.3V has to be low for more than a certain period of time before POR can be done correctly? Thank you.

--SL

Re: Vybrid multiple resets

Pavel — Tue, 28 Mar 2017 06:52:04 GMT

Most of processors required that power voltage should go to 0V before it came back up to 3.3V. This requirement is needed since processor use internal circuit for power up. This circuit is used for processor register initialization (resetting) at power up.

It looks like that this Vybrid internal circuit goes to initial state if 3.3V remains low for 1 second or so.

Have a great day,
Pavel Chubakov