topic Cache, set associate to direct mapped in Vybrid Processors

Cache, set associate to direct mapped

hjk — Thu, 09 Jun 2016 06:09:02 GMT

I read this on the ARM programmer guide

"You can lock the replacement algorithm on a way basis, enabling the associativity to be reduced from eight-way down to one-way, direct mapped."

Register 9 is the lockdown register, but I don't know how to use it, I saw "MRC p15,0,<Rd>,c9,c0,0" on ARM website, I have no idea how exactly it was used.

can someone provide an example of what exactly should I put in Rd, and how do I determine it is a read or write?

Thanks,

Re: Cache, set associate to direct mapped

karina_valencia — Mon, 13 Jun 2016 21:58:43 GMT

timesyssupport can you help here?

Re: Cache, set associate to direct mapped

karina_valencia — Mon, 20 Jun 2016 16:26:36 GMT

Timesys Support do you have an update?

Re: Cache, set associate to direct mapped

timesyssupport — Tue, 21 Jun 2016 16:15:55 GMT

Hi,

The commands 'MRC' and 'MCR' are used to specify if its a read or a write operation. MRC stands for "send a command to a coprocessor and get some data back" and MCR is "send a command to a coprocessor and pass some data along".

Rd is the core register and its contents must be the value needed to be set in the register. I will update you with the example commands soon, meanwhile please refer the below link for more information "ARM Information Center ".

Thanks,

Timesys Support.

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CommunityBot — Thu, 03 Sep 2020 19:11:50 GMT

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