topic Re: Flush Cache in A5 Linux in Vybrid Processors

Flush Cache in A5 Linux

carlovalgocela — Tue, 24 Nov 2015 09:45:20 GMT

I encountered some issues writing to a memory that we allocated to be shared both the A5 and M4.

When I write to the shared memory in A5, not all data is being reflected immediately. It will only reflect when we tried to rewrite the data again.

Here is a scenario of what i am doing.

1. mmap the /dev/mem

2. update data in the shared memory

3. read in the M4.

Result: not all are reflected.

4. rewrite again in A5.

5. read in the M4.

Result: all are reflected.

We have similar experience in M4 and we solve it by calling _DCACHE_FLUSH_MLINES(). to flush the data after writing.

Does anybody know what would be the equivalent for flushing DCACHE in A5?

Thanks

Re: Flush Cache in A5 Linux

karina_valencia — Mon, 30 Nov 2015 17:22:58 GMT

timesyssupport can you help here?

Re: Flush Cache in A5 Linux

timesyssupport — Mon, 30 Nov 2015 18:45:15 GMT

Hello Carlo,

As suggested in the ticket you have open with our Support Engineers, MCC_DECACHE_INVALIDATE_MLINES may be what you are looking for, you can refer to https://linuxlink.timesys.com/system/files/Vybrid_mcc_design.pdf for further insight/examples.

Alternatively, reviewing arch/arm/mm/cache-l2x0.c, you will see the 'l2x0_flush_all()' function, which will flush the entire L2 cache.

Regards,

Timesys Support

Re: Flush Cache in A5 Linux

carlovalgocela — Tue, 01 Dec 2015 01:59:36 GMT

Hello timesyssupport,

Currently I am not using the MCC and the A5 application is a userspace not in the kernel.

I used mmap to map the memory.

I found a site that calls a clear cache. __clear_cache() to flush and invalidate the cache but still not working or I missed some prerequisite.

https://minghuasweblog.wordpress.com/2013/03/29/arm-cache-flush-on-mmapd-buffers-with-clear-cache/

Re: Flush Cache in A5 Linux

karina_valencia — Mon, 07 Dec 2015 16:25:00 GMT

timesyssupport please continue with the follow up.

Re: Flush Cache in A5 Linux

timesyssupport — Mon, 07 Dec 2015 17:08:57 GMT

Hello Carlo,

Does this function not satisfy your needs:

arch/arm/mm/cache-l2x0.c, 'l2x0_flush_all()' function

http://lxr.free-electrons.com/source/arch/arm/mm/cache-l2x0.c?v=3.13#L149

Regards,

Timesys Support

Re: Flush Cache in A5 Linux

carlovalgocela — Tue, 08 Dec 2015 00:33:03 GMT

Hello Timesys,

I am looking for a userspace function to flush all cache.

Re: Flush Cache in A5 Linux

timesyssupport — Tue, 08 Dec 2015 14:15:59 GMT

Hello Carlo,

I don't believe this is possible from userspace; most discussion I can find along these lines suggest a kernel driver to flush cache, as userspace would not have permission to modify memory.

Regards,

Timesys Support

This an automatic process. We are marking this post as s...

CommunityBot — Thu, 03 Sep 2020 17:23:43 GMT

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