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    <title>topic Vybrid PIT DMA Triggers in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431240#M4791</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I see in the VF6xx data sheet that the PIT is supposed to be able to trigger DMA requests.&amp;nbsp; However, the documentation for this seems to be lacking.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anyone have an example of starting a DMA transfer from a PIT without using a processor interrupt?&amp;nbsp; Or is this not possible?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Nathan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 11 Aug 2015 17:37:45 GMT</pubDate>
    <dc:creator>nathanb_</dc:creator>
    <dc:date>2015-08-11T17:37:45Z</dc:date>
    <item>
      <title>Vybrid PIT DMA Triggers</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431240#M4791</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I see in the VF6xx data sheet that the PIT is supposed to be able to trigger DMA requests.&amp;nbsp; However, the documentation for this seems to be lacking.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anyone have an example of starting a DMA transfer from a PIT without using a processor interrupt?&amp;nbsp; Or is this not possible?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Nathan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 11 Aug 2015 17:37:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431240#M4791</guid>
      <dc:creator>nathanb_</dc:creator>
      <dc:date>2015-08-11T17:37:45Z</dc:date>
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    <item>
      <title>Re: Vybrid PIT DMA Triggers</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431241#M4792</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/alejandrolozano"&gt;alejandrolozano&lt;/A&gt;​ are you able to help here?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Aug 2015 17:01:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431241#M4792</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-08-24T17:01:47Z</dc:date>
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    <item>
      <title>Re: Vybrid PIT DMA Triggers</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431242#M4793</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Right now, that is not possble becuase of an errata:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P data-canvas-width="815.2000000000003" style="font-size: 20px; font-family: sans-serif;"&gt;e4588: DMAMUX: When using &lt;SPAN class="highlight selected"&gt;PIT&lt;/SPAN&gt; with "always enabled" request, DMA request does&lt;/P&gt;&lt;P data-canvas-width="208.95999999999995" style="font-size: 20px; font-family: sans-serif;"&gt;not deassert correctly&lt;/P&gt;&lt;P data-canvas-width="97.23333333333333" style="font-size: 16.6667px; font-family: sans-serif;"&gt;Description:&lt;/P&gt;&lt;P data-canvas-width="666.0333333333331" style="font-size: 16.6667px; font-family: sans-serif;"&gt;The PIT module is not assigned as a stand-alone DMA request source in the DMA request&lt;/P&gt;&lt;P data-canvas-width="699.3666666666664" style="font-size: 16.6667px; font-family: sans-serif;"&gt;mux. Instead, the PIT is used as the trigger for the DMAMUX periodic trigger mode. If you want&lt;/P&gt;&lt;P data-canvas-width="681.8" style="font-size: 16.6667px; font-family: sans-serif;"&gt;to use one of the PIT channels for periodic DMA requests, you would use the periodic trigger&lt;/P&gt;&lt;P data-canvas-width="651.9166666666665" style="font-size: 16.6667px; font-family: sans-serif;"&gt;mode in conjunction with one of the "always enabled" DMA requests. However, the DMA&lt;/P&gt;&lt;P data-canvas-width="334.4" style="font-size: 16.6667px; font-family: sans-serif;"&gt;request does not assert correctly in this case.&lt;/P&gt;&lt;P data-canvas-width="656.7666666666663" style="font-size: 16.6667px; font-family: sans-serif;"&gt;Instead of sending a single DMA request every time the PIT expires, the first time the PIT&lt;/P&gt;&lt;P data-canvas-width="690.7999999999997" style="font-size: 16.6667px; font-family: sans-serif;"&gt;triggers a DMA transfer the "always enabled" source will not negate its request. This results in&lt;/P&gt;&lt;P data-canvas-width="522.4333333333332" style="font-size: 16.6667px; font-family: sans-serif;"&gt;the DMA request remaining asserted continuously after the first trigger.&lt;/P&gt;&lt;P data-canvas-width="522.4333333333332" style="font-size: 16.6667px; font-family: sans-serif;"&gt;&lt;/P&gt;&lt;P data-canvas-width="103.69999999999999" style="font-size: 16.6667px; font-family: sans-serif;"&gt;Workaround:&lt;/P&gt;&lt;P data-canvas-width="103.69999999999999" style="font-size: 16.6667px; font-family: sans-serif;"&gt;&lt;/P&gt;&lt;P data-canvas-width="683.6499999999996" style="font-size: 16.6667px; font-family: sans-serif;"&gt;Use of the PIT to trigger DMA channels where the major loop count is greater than one is not&lt;/P&gt;&lt;P data-canvas-width="671.5499999999997" style="font-size: 16.6667px; font-family: sans-serif;"&gt;recommended. For periodic triggering of DMA requests with major loop counts greater than&lt;/P&gt;&lt;P data-canvas-width="515.9833333333331" style="font-size: 16.6667px; font-family: sans-serif;"&gt;one, we recommended using another timer module instead of the PIT.&lt;/P&gt;&lt;P data-canvas-width="660.5166666666664" style="font-size: 16.6667px; font-family: sans-serif;"&gt;If using the PIT to trigger a DMA channel where the major loop count is set to one, then in&lt;/P&gt;&lt;P data-canvas-width="655.8499999999999" style="font-size: 16.6667px; font-family: sans-serif;"&gt;order to get the desired periodic triggering, the DMA must do the following in the interrupt&lt;/P&gt;&lt;P data-canvas-width="329.7333333333334" style="font-size: 16.6667px; font-family: sans-serif;"&gt;service routine for the DMA_DONE interrupt:&lt;/P&gt;&lt;P data-canvas-width="633.0666666666667" style="font-size: 16.6667px; font-family: sans-serif;"&gt;1. Set the DMA_TCDn_CSR[DREQ] bit and configure DMAMUX_CHCFGn[ENBL] = 0&lt;/P&gt;&lt;P data-canvas-width="650.1999999999999" style="font-size: 16.6667px; font-family: sans-serif;"&gt;2. Then again DMAMUX_CHCFGn[ENBL] = 1, DMASREQ=channel in your DMA DONE&lt;/P&gt;&lt;P data-canvas-width="675.0999999999998" style="font-size: 16.6667px; font-family: sans-serif;"&gt;interrupt service routine so that "always enabled" source could negate its request then DMA&lt;/P&gt;&lt;P data-canvas-width="192.7166666666667" style="font-size: 16.6667px; font-family: sans-serif;"&gt;request could be negated.&lt;/P&gt;&lt;P data-canvas-width="506.6833333333334" style="font-size: 16.6667px; font-family: sans-serif;"&gt;This will allow the desired periodic triggering to function as expected.&lt;/P&gt;&lt;P data-canvas-width="506.6833333333334" style="font-size: 16.6667px; font-family: sans-serif;"&gt;&lt;/P&gt;&lt;P data-canvas-width="506.6833333333334" style="font-size: 16.6667px; font-family: sans-serif;"&gt;Best Regards,&lt;/P&gt;&lt;P data-canvas-width="506.6833333333334" style="font-size: 16.6667px; font-family: sans-serif;"&gt;Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Aug 2015 17:13:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431242#M4793</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2015-08-24T17:13:20Z</dc:date>
    </item>
    <item>
      <title>Re: Vybrid PIT DMA Triggers</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431243#M4794</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Does this still apply, or the hw was revised?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Oct 2017 12:45:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/431243#M4794</guid>
      <dc:creator>dry</dc:creator>
      <dc:date>2017-10-10T12:45:57Z</dc:date>
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    <item>
      <title>This an automatic process.  We are marking this post as s...</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/1137567#M6106</link>
      <description>&lt;B&gt;This an automatic process.&lt;/B&gt;&lt;BR /&gt;&lt;BR /&gt;
We are marking this post as solved, due to the either low activity or any reply marked as correct.&lt;BR /&gt;&lt;BR /&gt;
If you have additional questions, please create a new post and reference to this closed post.&lt;BR /&gt;&lt;BR /&gt;
NXP Community!</description>
      <pubDate>Thu, 03 Sep 2020 17:17:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-PIT-DMA-Triggers/m-p/1137567#M6106</guid>
      <dc:creator>CommunityBot</dc:creator>
      <dc:date>2020-09-03T17:17:35Z</dc:date>
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