<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic About AC spec for SDHC in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234773#M463</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear support,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about AC spec of SDHC in datasheet p,76.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1.&lt;/P&gt;&lt;P&gt;Does the value of SD2 and SD3 not have the frequency dependence?&lt;/P&gt;&lt;P&gt;When I use it in 25Mhz, I suppose the minimum to be 7ns, I think whether matching does not match the SD side.&lt;/P&gt;&lt;P&gt;Please teach it when other value include frequency dependence.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.&lt;/P&gt;&lt;P&gt;When SD6 is maximum 8.3ns and SD2 is minimum 7ns, I think that can not output the signal by the next rise.&lt;/P&gt;&lt;P&gt;Is the rise of SD6 reliable by a fall?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke Watanabe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 01 Aug 2013 10:27:26 GMT</pubDate>
    <dc:creator>keisukewatanabe</dc:creator>
    <dc:date>2013-08-01T10:27:26Z</dc:date>
    <item>
      <title>About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234773#M463</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear support,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about AC spec of SDHC in datasheet p,76.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1.&lt;/P&gt;&lt;P&gt;Does the value of SD2 and SD3 not have the frequency dependence?&lt;/P&gt;&lt;P&gt;When I use it in 25Mhz, I suppose the minimum to be 7ns, I think whether matching does not match the SD side.&lt;/P&gt;&lt;P&gt;Please teach it when other value include frequency dependence.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.&lt;/P&gt;&lt;P&gt;When SD6 is maximum 8.3ns and SD2 is minimum 7ns, I think that can not output the signal by the next rise.&lt;/P&gt;&lt;P&gt;Is the rise of SD6 reliable by a fall?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke Watanabe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Aug 2013 10:27:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234773#M463</guid>
      <dc:creator>keisukewatanabe</dc:creator>
      <dc:date>2013-08-01T10:27:26Z</dc:date>
    </item>
    <item>
      <title>Re: About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234774#M464</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Keisuke,&lt;/P&gt;&lt;P&gt;I guess we are talking about an interface used with an SDHC card.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;May you be more design-specific, please?&lt;/P&gt;&lt;P&gt;Is your &lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Vybrid-based&lt;/SPAN&gt;&lt;SPAN style="line-height: 1.5em; font-size: 10pt;"&gt; design experiencing any issues while &lt;/SPAN&gt;communicating&lt;SPAN style="font-size: 10pt;"&gt;&lt;SPAN style="line-height: 1.5em;"&gt; with a card? If so, then &lt;/SPAN&gt;&lt;SPAN style="line-height: 19.5px;"&gt;what&lt;/SPAN&gt;&lt;SPAN style="line-height: 1.5em;"&gt; card type, in which circumstances, etc., please?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="line-height: 1.5em; font-size: 10pt;"&gt;Sincerely, Naoum Gitnik.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Aug 2013 22:59:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234774#M464</guid>
      <dc:creator>naoumgitnik</dc:creator>
      <dc:date>2013-08-02T22:59:42Z</dc:date>
    </item>
    <item>
      <title>Re: About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234775#M465</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Naoum,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think that there is a conflict in the Table 61. SDHC switching specifications of datasheet.&lt;/P&gt;&lt;P&gt;In the following cases, I think the data will be not valid.&lt;/P&gt;&lt;P&gt;SD1=50Mhz&lt;/P&gt;&lt;P&gt;SD2=7ns&lt;/P&gt;&lt;P&gt;SD6=8.3ns(max)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In this case, what is the workaround?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please tell me, if this idea is wrong.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke Watanabe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Aug 2013 04:33:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234775#M465</guid>
      <dc:creator>keisukewatanabe</dc:creator>
      <dc:date>2013-08-06T04:33:38Z</dc:date>
    </item>
    <item>
      <title>Re: About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234776#M466</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Naoum,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;About Table 61. SDHC switching specifications, I am considered as follows.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When SD1 is 50MHz, SD2 and SD3 is 7ns.&lt;/P&gt;&lt;P&gt;When SD1 is 25Mhz, SD2 and SD3 is 17ns.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;SD2=SD3 : According to datasheet.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;SD4=SD5: According to datasheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i.e. SD1=SD2+SD3+SD4+SD5&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is this idea right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Aug 2013 11:01:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234776#M466</guid>
      <dc:creator>keisukewatanabe</dc:creator>
      <dc:date>2013-08-06T11:01:24Z</dc:date>
    </item>
    <item>
      <title>Re: About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234777#M467</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Dear Keisuke,&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Unfortunately, it is quite difficult to know all the details from the Reference Manual counting a few thousand pages, e.g. timing requirements for standard interfaces usually copied from their specifications. &lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Based on my experience, much more efficient is focusing on actual problems observed in the customers' designs.&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="font-style: inherit; font-size: 10pt; font-family: inherit;"&gt;Sincerely, Naoum Gitnik.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Aug 2013 22:56:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234777#M467</guid>
      <dc:creator>naoumgitnik</dc:creator>
      <dc:date>2013-08-06T22:56:39Z</dc:date>
    </item>
    <item>
      <title>Re: About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234778#M468</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Dear Naoum,&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;I will ask the same question again.&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;================&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;About Table 61. SDHC switching specifications, I am considered as follows.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;When SD1 is 50MHz, SD2 and SD3 is 7ns.&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;When SD1 is 25Mhz, SD2 and SD3 is 17ns.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;&lt;SPAN style="font-style: inherit; font-size: 10pt; font-family: inherit;"&gt;SD2=SD3 : According to datasheet.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;SD4=SD5: According to datasheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;i.e. SD1=SD2+SD3+SD4+SD5&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; color: #3d3d3d;"&gt;Is this idea right?&lt;/P&gt;&lt;P&gt;================&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does it mean that it is difficult to reply this question?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke Watanabe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 07 Aug 2013 01:36:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234778#M468</guid>
      <dc:creator>keisukewatanabe</dc:creator>
      <dc:date>2013-08-07T01:36:33Z</dc:date>
    </item>
    <item>
      <title>Re: About AC spec for SDHC</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234779#M469</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/naoumgitnik"&gt;naoumgitnik&lt;/A&gt; can you continue with the follow up on this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 30 Aug 2013 20:59:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-AC-spec-for-SDHC/m-p/234779#M469</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2013-08-30T20:59:16Z</dc:date>
    </item>
  </channel>
</rss>

