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    <title>Vybrid ProcessorsのトピックRe: IVT alignment requirement when booting from NAND</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414366#M4489</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/rendy"&gt;rendy&lt;/A&gt;​ can you comment please?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 21 May 2015 20:07:17 GMT</pubDate>
    <dc:creator>karina_valencia</dc:creator>
    <dc:date>2015-05-21T20:07:17Z</dc:date>
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      <title>IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414362#M4485</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Some time ago I hit an issue regarding alignment requirements of the IVT header when booting from NAND. It seems that Vybrid requires the IVT header to be 8-byte alignment in RAM in order to boot successfully. This requirement however, is not documented anywhere, hence I'm not sure if I miss something here. To illustrate the issue better, I attached a PNG which draws the picture better.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Current U-Boot versions generate an IVT header which are likely odd regarding this 8-byte alignment. I tested the drawn variants using U-Boot and manually altered the headers. In all variants I stripped the DCD completely, hence the header only consisted of the IVT header and the boot data header. All images with the headers worked fine when using the serial loader, however, the non-8-byte aligned IVT header failed to boot from NAND flash.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;00000000&amp;nbsp; d1 00 20 40 00 80 40 3f&amp;nbsp; 00 00 00 00 00 00 00 00&amp;nbsp; |.. @..@?........|&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;00000010&amp;nbsp; f4 7f 40 3f d4 7f 40 3f&amp;nbsp; 00 00 00 00 00 00 00 00&amp;nbsp; |..@?..@?........|&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;00000020&amp;nbsp; d4 7b 40 3f 00 c0 05 00&amp;nbsp; 00 00 00 00 be 00 00 ea&amp;nbsp; |.{@?............|&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'courier new', courier;"&gt;00000030&amp;nbsp; 14 f0 9f e5 14 f0 9f e5&amp;nbsp; 14 f0 9f e5 14 f0 9f e5&amp;nbsp; |................|&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Verified this behavior on a Toradex Colibri VF61 as well as on a Vybrid Tower Module Rev. G. I guess it requires knowledge of the internal boot ROM to understand if this is really an alignment requirement. Note that the U-Boot version which Timesys provides generates an IVT header which aligns on a 8-byte boundary, hence the problem does not appear with that U-Boot version.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There has been a discussion on the U-Boot mailing list about this: &lt;A href="http://lists.denx.de/pipermail/u-boot/2014-April/178022.html" title="http://lists.denx.de/pipermail/u-boot/2014-April/178022.html"&gt;[U-Boot] [PATCH] tools: make imxheader size align on page size&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--&lt;/P&gt;&lt;P&gt;Stefan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 May 2015 14:45:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414362#M4485</guid>
      <dc:creator>falstaff</dc:creator>
      <dc:date>2015-05-08T14:45:04Z</dc:date>
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      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414363#M4486</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt;​ can you help with this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 11 May 2015 17:11:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414363#M4486</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-05-11T17:11:33Z</dc:date>
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    <item>
      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414364#M4487</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A _jive_internal="true" data-containerid="-1" data-containertype="-1" data-content-finding="Community" data-objectid="214905" data-objecttype="3" href="https://community.nxp.com/people/timesyssupport" style="font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #266fc8;"&gt;Timesys Support&lt;/A&gt;&lt;SPAN style="color: #000000; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt; do you have an update?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 May 2015 17:02:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414364#M4487</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-05-15T17:02:26Z</dc:date>
    </item>
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      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414365#M4488</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/karinavalencia"&gt;karinavalencia&lt;/A&gt;​ and &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/falstaff"&gt;falstaff&lt;/A&gt;​,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Freescale wrote the support for booting from NAND, we integrated as such, but are not able to provide any further insight beyond what's documented; the internal boot ROM process is not described in any documentation on-hand. Could someone from Freescale's Vybrid team comment on this Karina?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 May 2015 19:52:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414365#M4488</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2015-05-21T19:52:21Z</dc:date>
    </item>
    <item>
      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414366#M4489</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/rendy"&gt;rendy&lt;/A&gt;​ can you comment please?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 May 2015 20:07:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414366#M4489</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-05-21T20:07:17Z</dc:date>
    </item>
    <item>
      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414367#M4490</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, could you post some code example to help me getting into this?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 May 2015 11:28:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414367#M4490</guid>
      <dc:creator>rendy</dc:creator>
      <dc:date>2015-05-29T11:28:35Z</dc:date>
    </item>
    <item>
      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414368#M4491</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rene,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This is upstream U-Boot code. The U-Boot makefiles build an utility called "mkimage" which creates the IVT headers around the U-Boot binary. The utility requires a config file. For the Tower board, the command looks like this (the command is executed automatically by the build system, make V=1 shows the command with arguments):&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;./tools/mkimage -n board/freescale/vf610twr/imximage.cfg.cfgtmp -T imximage -e 0x3f408000 -d u-boot.bin u-boot.imx&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This utility currently creates a IVT header according to specifications, which works on i.MX6 and Vybrid (booting using serial downloader or SD card). However, from Vybrid NAND it doesn't work...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The relevant source code for the IVT header is in&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.denx.de/?p=u-boot.git;a=blob;f=tools/imximage.c;hb=HEAD" style="line-height: 1.5;" title="http://git.denx.de/?p=u-boot.git;a=blob;f=tools/imximage.c;hb=HEAD"&gt;http://git.denx.de/?p=u-boot.git;a=blob;f=tools/imximage.c;hb=HEAD&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Probably more interesting are the data structures:&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.denx.de/?p=u-boot.git;a=blob;f=tools/imximage.h;hb=HEAD" style="line-height: 1.5;" title="http://git.denx.de/?p=u-boot.git;a=blob;f=tools/imximage.h;hb=HEAD"&gt;http://git.denx.de/?p=u-boot.git;a=blob;f=tools/imximage.h;hb=HEAD&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, when changing the data structures to align the headers to a 8-byte boundary, e.g. using my proposed change, the boot ROM is able to boot the image even from NAND:&lt;/P&gt;&lt;P&gt;&lt;A href="http://lists.denx.de/pipermail/u-boot/2014-April/177580.html" title="http://lists.denx.de/pipermail/u-boot/2014-April/177580.html"&gt;[U-Boot] [PATCH] tools: make imxheader size align on page size&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--&lt;/P&gt;&lt;P&gt;Stefan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 May 2015 11:46:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414368#M4491</guid>
      <dc:creator>falstaff</dc:creator>
      <dc:date>2015-05-29T11:46:12Z</dc:date>
    </item>
    <item>
      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414369#M4492</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Stefan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Now I'm able to boot from NAND with mainline U-boot, but if I need to update U-Boot, how can I do, it seems missing something to write FCB.&lt;/P&gt;&lt;P&gt;Is there any way to do it or I'm stuck with U-boot TimeSys? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Emmanuel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 Jun 2015 07:34:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414369#M4492</guid>
      <dc:creator>Nouchi</dc:creator>
      <dc:date>2015-06-03T07:34:40Z</dc:date>
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      <title>Re: IVT alignment requirement when booting from NAND</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414370#M4493</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Emmanuel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A forward ported version to write the BCB (boot configuration block), which the FCB is the relevant part of to boot U-Boot. You might to alter the ECC mode (&lt;SPAN style="color: #008000; font-family: monospace; font-size: 13.3333330154419px;"&gt;ecc_block_0_ecc_type&lt;/SPAN&gt;) to match the mode you are using (the branch also contains some changes to the NAND driver for Vybrid which are not yet part of U-Boot 2015.04. However, those changes have been submitted and will land in 2015.07).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://git.toradex.com/cgit/u-boot-toradex.git/commit/?h=2015.04-toradex-next&amp;amp;id=b004926168f3bc15f9e26f14c16ae60a252b1304" title="http://git.toradex.com/cgit/u-boot-toradex.git/commit/?h=2015.04-toradex-next&amp;amp;id=b004926168f3bc15f9e26f14c16ae60a252b1304"&gt;u-boot-toradex.git - U-Boot bootloader for Apalis and Colibri modules&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--&lt;/P&gt;&lt;P&gt;Stefan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 Jun 2015 07:57:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/414370#M4493</guid>
      <dc:creator>falstaff</dc:creator>
      <dc:date>2015-06-03T07:57:45Z</dc:date>
    </item>
    <item>
      <title>This an automatic process.  We are marking this post as s...</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/1137288#M6090</link>
      <description>&lt;B&gt;This an automatic process.&lt;/B&gt;&lt;BR /&gt;&lt;BR /&gt;
We are marking this post as solved, due to the either low activity or any reply marked as correct.&lt;BR /&gt;&lt;BR /&gt;
If you have additional questions, please create a new post and reference to this closed post.&lt;BR /&gt;&lt;BR /&gt;
NXP Community!</description>
      <pubDate>Thu, 03 Sep 2020 16:55:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/IVT-alignment-requirement-when-booting-from-NAND/m-p/1137288#M6090</guid>
      <dc:creator>CommunityBot</dc:creator>
      <dc:date>2020-09-03T16:55:30Z</dc:date>
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