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    <title>topic Re: Can QSPI1 &amp; QSPI0 be active at the same time? in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397543#M4300</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt;​ can you help to review this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 19 Oct 2015 17:44:37 GMT</pubDate>
    <dc:creator>karina_valencia</dc:creator>
    <dc:date>2015-10-19T17:44:37Z</dc:date>
    <item>
      <title>Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397542#M4299</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm currently working on an application that runs on a Vybrid MPU.&lt;/P&gt;&lt;P&gt;The application uses QSPI0 for the NOR FLASH access, and QSPI for a serial SRAM (NO1S830HA) access.&lt;/P&gt;&lt;P&gt;Both interfaces have to be active at the same time,&lt;/P&gt;&lt;P&gt;and as far as I've seen in your demo examples (configurations : &lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif';"&gt;svf522revb_m4, svf522revb_a5,twrvf65gs10_a5 and twrvf65gs10_m4) this option is disabled by software.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif';"&gt;Since we are currently experiencing problems in the testing, I would have like to know whether this mode of operation is possible,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif';"&gt;and if so - under which circumstances and what needs to be done in order to ensure its proper functioning.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif';"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Thanks in advance,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif';"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Tali&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Oct 2015 12:45:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397542#M4299</guid>
      <dc:creator>taliazmanov</dc:creator>
      <dc:date>2015-10-15T12:45:37Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397543#M4300</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt;​ can you help to review this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Oct 2015 17:44:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397543#M4300</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-10-19T17:44:37Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397544#M4301</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Tali,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Are you developing for Linux, or MQX?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Oct 2015 22:47:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397544#M4301</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2015-10-19T22:47:25Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397545#M4302</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I’m developing for MQX 4.0.2.&lt;/P&gt;&lt;P&gt;   Thanks,&lt;/P&gt;&lt;P&gt;        Tali&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Oct 2015 08:22:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397545#M4302</guid>
      <dc:creator>taliazmanov</dc:creator>
      <dc:date>2015-10-20T08:22:37Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397546#M4303</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Which version of the Vybrid processor are you developing for? VF6, or VF5? Is this evaluation hardware, or a custom design?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Oct 2015 13:59:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397546#M4303</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2015-10-20T13:59:47Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397547#M4304</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;The Vybrid version is vF5, and this is a custom design board.&lt;/P&gt;&lt;P&gt;   Regards,&lt;/P&gt;&lt;P&gt;         Tali.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Oct 2015 14:31:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397547#M4304</guid>
      <dc:creator>taliazmanov</dc:creator>
      <dc:date>2015-10-20T14:31:38Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397548#M4305</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tail,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you describe the behavior you are facing? As I see, there should not be any issue when using both&amp;nbsp; QSPI modules. They are mapped to different memory locations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Oct 2015 01:01:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397548#M4305</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2015-10-21T01:01:22Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397549#M4306</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alejandro,&lt;/P&gt;&lt;P&gt;The behaviour I’m seeing is different performance results in read operations when working in a standalone single-core configuration,&lt;/P&gt;&lt;P&gt;Where the driver is a single task running on M4 only, and is based on your svf522revb_m4 example that comes with the Vybrid MQX 4.1 s/w,&lt;/P&gt;&lt;P&gt;With only QSPI1 enabled and active,&lt;/P&gt;&lt;P&gt;Where the results for reading a 64 bytes block were fixed on 47 microseconds,&lt;/P&gt;&lt;P&gt;And our application configuration, which is a dual core (with A5 active also) where  the QSPI1 driver is implemented as the highest priority pre-emptive task,&lt;/P&gt;&lt;P&gt;And the QSPI0 is used for the NOR-FLASH (where the code is located)  which is being accessed by A5.&lt;/P&gt;&lt;P&gt;In the application configuration (dual core, dual QSPI i/f’s) I’ve got inconsistent results for the read operation in the range of 360-590 microsec.,&lt;/P&gt;&lt;P&gt;Which suggest that the read operation, although implemented as a highest priority pre-emptive task, was interrupted by another event/s.&lt;/P&gt;&lt;P&gt;I’ve checked in the QSPI example drivers that come with the Vybrid MQX 4.1 s/w, and saw that in all of them,&lt;/P&gt;&lt;P&gt;The option of both i/f’s (QSPI0 &amp;amp; QSPI1) active at the same time is disabled by s/w ( please see BSP_QUADSPI_MEMORY_CHANNEL flag),&lt;/P&gt;&lt;P&gt;And wondered whether that could be the reason.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;     Looking forward to your answer,&lt;/P&gt;&lt;P&gt;           Thanks,&lt;/P&gt;&lt;P&gt;                 Tali&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Oct 2015 06:59:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397549#M4306</guid>
      <dc:creator>taliazmanov</dc:creator>
      <dc:date>2015-10-21T06:59:51Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397550#M4307</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/alejandrolozano"&gt;alejandrolozano&lt;/A&gt;​ do you have an update?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Oct 2015 17:36:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397550#M4307</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-10-26T17:36:20Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397551#M4308</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tali,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have checked the latest MQX realease 4.2 and I have not found the BSP_QUADSPI_MEMORY_CHANNEL flag/macro.&lt;/P&gt;&lt;P&gt;Have you tried the newest version?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/Alejandro&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Oct 2015 23:41:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397551#M4308</guid>
      <dc:creator>alejandrolozan1</dc:creator>
      <dc:date>2015-10-27T23:41:26Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397552#M4309</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/taliazmanov"&gt;taliazmanov&lt;/A&gt;​ did you get previous update?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Nov 2015 16:32:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397552#M4309</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-11-03T16:32:39Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397553#M4310</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, not sure what you mean by previous update&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Nov 2015 16:46:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397553#M4310</guid>
      <dc:creator>taliazmanov</dc:creator>
      <dc:date>2015-11-03T16:46:35Z</dc:date>
    </item>
    <item>
      <title>Re: Can QSPI1 &amp; QSPI0 be active at the same time?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397554#M4311</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I mean the&amp;nbsp; comment&amp;nbsp; from Alejandro.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Nov 2015 18:37:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/397554#M4311</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2015-11-03T18:37:22Z</dc:date>
    </item>
    <item>
      <title>This an automatic process.  We are marking this post as s...</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/1136982#M6079</link>
      <description>&lt;B&gt;This an automatic process.&lt;/B&gt;&lt;BR /&gt;&lt;BR /&gt;
We are marking this post as solved, due to the either low activity or any reply marked as correct.&lt;BR /&gt;&lt;BR /&gt;
If you have additional questions, please create a new post and reference to this closed post.&lt;BR /&gt;&lt;BR /&gt;
NXP Community!</description>
      <pubDate>Thu, 03 Sep 2020 16:35:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Can-QSPI1-QSPI0-be-active-at-the-same-time/m-p/1136982#M6079</guid>
      <dc:creator>CommunityBot</dc:creator>
      <dc:date>2020-09-03T16:35:46Z</dc:date>
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