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    <title>topic Re: How many QSPI ports does the VF6 have? Can they be used simultaneously? in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380458#M3968</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Flavio!&lt;/P&gt;&lt;P&gt;Please, take a look at the &lt;A href="https://community.nxp.com/message/423133"&gt;Re: Parallel QuadSPI&lt;/A&gt; and &lt;A href="https://community.nxp.com/message/341393"&gt;Re: Can Vybrid boot from the only QSPI_B?&lt;/A&gt; threads and let me know if you still have any questions.&lt;/P&gt;&lt;P&gt;Attached is also an excerpt from one of the Freescale designs with 3 QuadSPI (QSPI) memory chips used.&lt;/P&gt;&lt;P&gt;Sincerely, Naoum Gitnik.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 09 Oct 2014 22:09:11 GMT</pubDate>
    <dc:creator>naoumgitnik</dc:creator>
    <dc:date>2014-10-09T22:09:11Z</dc:date>
    <item>
      <title>How many QSPI ports does the VF6 have? Can they be used simultaneously?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380457#M3967</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In the document &lt;A href="http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4947.pdf?fasp=1&amp;amp;WT_TYPE=Application%20Notes&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf" style="color: #017bba; font-family: arial, sans-serif; font-size: 12px;"&gt;AN4947&lt;/A&gt;&lt;SPAN style="color: #51626f; font-family: arial, sans-serif; font-size: 12px;"&gt; - Understanding Vybrid Architecture&lt;SPAN style="font-size: 10pt;"&gt;, figure 1, depicts a QuadSPI-0 and a QuadSPI-1. I could not find within the documentation much information on the QuadSPI-1. The idea is to use the QuadSPI-0 as an interface for 2 serial flash, while the QuadSPI-1 as an interface for a FPGA. &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can both QSPI-0 &amp;amp; QSPI-1 be used simultaneously? Are there any restrictions? Any special considerations when using QSPI-1?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Flavio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Oct 2014 16:28:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380457#M3967</guid>
      <dc:creator>flaviocaduda</dc:creator>
      <dc:date>2014-10-09T16:28:58Z</dc:date>
    </item>
    <item>
      <title>Re: How many QSPI ports does the VF6 have? Can they be used simultaneously?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380458#M3968</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Flavio!&lt;/P&gt;&lt;P&gt;Please, take a look at the &lt;A href="https://community.nxp.com/message/423133"&gt;Re: Parallel QuadSPI&lt;/A&gt; and &lt;A href="https://community.nxp.com/message/341393"&gt;Re: Can Vybrid boot from the only QSPI_B?&lt;/A&gt; threads and let me know if you still have any questions.&lt;/P&gt;&lt;P&gt;Attached is also an excerpt from one of the Freescale designs with 3 QuadSPI (QSPI) memory chips used.&lt;/P&gt;&lt;P&gt;Sincerely, Naoum Gitnik.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 09 Oct 2014 22:09:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380458#M3968</guid>
      <dc:creator>naoumgitnik</dc:creator>
      <dc:date>2014-10-09T22:09:11Z</dc:date>
    </item>
    <item>
      <title>Re: How many QSPI ports does the VF6 have? Can they be used simultaneously?</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380459#M3969</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you Naoum!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Oct 2014 14:27:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/How-many-QSPI-ports-does-the-VF6-have-Can-they-be-used/m-p/380459#M3969</guid>
      <dc:creator>flaviocaduda</dc:creator>
      <dc:date>2014-10-13T14:27:42Z</dc:date>
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