topic Re: USB LDO Specification in Vybrid Processors

USB LDO Specification

markwatson — Sun, 08 Mar 2015 20:34:03 GMT

We are seeing some intermittent failures with the USB communication between our device (MVF61NS151...) and a host PC. I started investigating and noted that the USB Dcap voltage is about 2.7 volts. The tower board schematic labels this as 3V3 and the VYBRIDFSERIESEC on page 30 shows it as 3p0. What is the correct voltage for the internal regulator for USB? My bus voltage is at least 4.9 V, so that is not the problem. Is there a register setting to disable the internal regulator? I have no loads on the Dcap piin, just a couple of capacitors.

Re: USB LDO Specification

markwatson — Tue, 10 Mar 2015 20:00:44 GMT

I have determined that this is intended to be 3.0 V. The Linux kernel was not enabling the regulator in the ANADIG section in the ANADIG_REG_3P0 register. The lowest order bit must be set.

Re: USB LDO Specification

karina_valencia — Fri, 13 Mar 2015 15:02:10 GMT

timesyssupport can you review this case?

Re: USB LDO Specification

karina_valencia — Tue, 17 Mar 2015 16:51:24 GMT

timesyssupport do you have an update?

Re: USB LDO Specification

timesyssupport — Tue, 17 Mar 2015 18:25:44 GMT

Hello Mark,

Thanks for following up with this; we have a ticket reporting the exact same issue/fix in our support queue and will be addressing this in our 3.13 Vybrid kernel support. Though not stated here, is it correct to assume this is while running the Timesys Vybrid kernel?

Thank you,

Timesys Support

Re: USB LDO Specification

karina_valencia — Fri, 20 Mar 2015 19:44:30 GMT

markwatson please answer previous question from Timesys