topic Re: Vybrid RTC reset after power off in Vybrid Processors

Vybrid RTC reset after power off

jeremyesquirol — Fri, 12 Sep 2014 13:47:34 GMT

Hi Vybrid's users.

I'm having trouble with the SNVS RTC on Phycore Vybrid board using linux. We have the last revision of Vybrid : "2N02G" (with the VBAT issue solved) and it seems that time is lost when we powered off the board, while we have a battery (Vbat = 3.1V).

We used the default SNVS_RTC driver and looking the source file, it's said that snvs-rtc is used in non secure mode, is that why the time is not stored? it's a normal feature?

Re: Vybrid RTC reset after power off

karina_valencia — Fri, 12 Sep 2014 16:32:54 GMT

timesyssupport can you help with this case?

Re: Vybrid RTC reset after power off

timesyssupport — Fri, 12 Sep 2014 22:13:18 GMT

Hello Jérémy,

I have observed this behavior on the Vybrid Tower in the past. I will attempt to reproduce on the pcm052, and let you know what I find. If this is an issue on the pcm052, I don't have an estimated ETA for a fix. If this is a time-sensitive issue for you, I would recommend escalating with Timesys under a services agreement.

Thanks,

Timesys Support

Re: Vybrid RTC reset after power off

naoumgitnik — Mon, 15 Sep 2014 18:07:57 GMT

Dear Jeremy,

Please, take a look at the Re: RTC in TWR-Vybrid doesn't keep time thread - it might help.

Regards, Naoum Gitnik.

[timesyssupport]

Re: Vybrid RTC reset after power off

jeremyesquirol — Tue, 16 Sep 2014 07:07:02 GMT

Hi Naoum,

I wiil try with a lower resistance but I dont think itt will solve this problem. As I said before, I use the last revision of Vybrid, with Hardware VBAT problem solved. (when main supply is off, Vbat is 3,1V and about 3µA)

The RTC is keeping right time if the board isn't switched off. If the main supply is lost the RTC is reset to 01/01/1970, 00:00:00.

I have a 3V battery attached and the VBAT tied to Coin Cell

Re: Vybrid RTC reset after power off

jeremyesquirol — Tue, 16 Sep 2014 08:44:47 GMT

Hi Naoum and Timesys support.

We've found an issue... On their new SoM revision Phytec dont tied the coin cell to the VBAT. They use a jumper placed on the SoM that don't appears on our schematics (J8 on new schematics). The jumper is not set by default, just add a 0 resistor to tied Vbat to Vbat_in (2-3 pads).