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    <title>topic Problems with shared memory switching between cores on crossworks/cmsis-dap in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357406#M3667</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am creating a dual core application with crossworks,starting with the example dual core application.&lt;/P&gt;&lt;P&gt;I want to have a shared area,like for mcc (shared-memory,0x3f040000). I was changing the size of A5 and M4 on the project properties,as to have that shared region on Bottom of the A5 part and on Top of M4 part(it fits)&lt;/P&gt;&lt;P&gt;After that,I was trying to debug the project,but it doesn't run as i think due to memory problem.&lt;/P&gt;&lt;P&gt;From one of the two cores,If I select an address of shared memory like 0x3f040000(or another region,in OCRAM,SRAM, from 0x3f000000 to 0x3f07FFFF,it is not so important) and try to write a value(or the program does it),when I change the project part to the other core,crossworks loses the value,like that the debugger doesn't really read the memory,but a local image of memory,or it could be that everytime I change to other core,it&amp;nbsp; reload the memory saved locally.I don't know.&lt;/P&gt;&lt;P&gt;Do you have an Idea of what could be the problem?actually I don't know what to modify(if it is possible to do what i want to do)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;P.S. I am trying even with DS-5 and the effect is the same.If I connect the A5 part,seems that i lost control on M4 part.And vice versa.Probably I have some problem on debugging the two cores at the same time...not only the shared memory is involved&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 27 Mar 2015 11:29:18 GMT</pubDate>
    <dc:creator>SlaveToTime</dc:creator>
    <dc:date>2015-03-27T11:29:18Z</dc:date>
    <item>
      <title>Problems with shared memory switching between cores on crossworks/cmsis-dap</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357406#M3667</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am creating a dual core application with crossworks,starting with the example dual core application.&lt;/P&gt;&lt;P&gt;I want to have a shared area,like for mcc (shared-memory,0x3f040000). I was changing the size of A5 and M4 on the project properties,as to have that shared region on Bottom of the A5 part and on Top of M4 part(it fits)&lt;/P&gt;&lt;P&gt;After that,I was trying to debug the project,but it doesn't run as i think due to memory problem.&lt;/P&gt;&lt;P&gt;From one of the two cores,If I select an address of shared memory like 0x3f040000(or another region,in OCRAM,SRAM, from 0x3f000000 to 0x3f07FFFF,it is not so important) and try to write a value(or the program does it),when I change the project part to the other core,crossworks loses the value,like that the debugger doesn't really read the memory,but a local image of memory,or it could be that everytime I change to other core,it&amp;nbsp; reload the memory saved locally.I don't know.&lt;/P&gt;&lt;P&gt;Do you have an Idea of what could be the problem?actually I don't know what to modify(if it is possible to do what i want to do)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;P.S. I am trying even with DS-5 and the effect is the same.If I connect the A5 part,seems that i lost control on M4 part.And vice versa.Probably I have some problem on debugging the two cores at the same time...not only the shared memory is involved&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 27 Mar 2015 11:29:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357406#M3667</guid>
      <dc:creator>SlaveToTime</dc:creator>
      <dc:date>2015-03-27T11:29:18Z</dc:date>
    </item>
    <item>
      <title>Re: Problems with shared memory switching between cores on crossworks/cmsis-dap</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357407#M3668</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alessandro,&lt;/P&gt;&lt;P&gt;What is running on both cores? MQX and Linux? Or what?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It need set memory for both cores same. Do you have it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does mcc work with default settings? (some example project or something like that)?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Vilem&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2015 06:53:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357407#M3668</guid>
      <dc:creator>VilemZ</dc:creator>
      <dc:date>2015-04-02T06:53:40Z</dc:date>
    </item>
    <item>
      <title>Re: Problems with shared memory switching between cores on crossworks/cmsis-dap</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357408#M3669</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;On Crossworks, It runs Baremetal on both cores.&lt;/P&gt;&lt;P&gt;On DS-5 It runs MQX on both cores with Ping-Pong example,using Mcc.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Apr 2015 08:38:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357408#M3669</guid>
      <dc:creator>SlaveToTime</dc:creator>
      <dc:date>2015-04-02T08:38:15Z</dc:date>
    </item>
    <item>
      <title>Re: Problems with shared memory switching between cores on crossworks/cmsis-dap</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357409#M3670</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alessandro,&lt;/P&gt;&lt;P&gt;Ping-Pong example doesn't work, too? &lt;/P&gt;&lt;P&gt;And how do you debug both cores? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Vilem&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Apr 2015 11:38:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357409#M3670</guid>
      <dc:creator>VilemZ</dc:creator>
      <dc:date>2015-04-03T11:38:16Z</dc:date>
    </item>
    <item>
      <title>Re: Problems with shared memory switching between cores on crossworks/cmsis-dap</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357410#M3671</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The problem with PingPong DS5 is solved now,but the problem with crossoworks is not solved yet.&lt;/P&gt;&lt;P&gt;I tried also to use Atollic TRUEstudio, the memory was correctly read,when I do "modprobe mcc" by Linux Side, Truestudio see the new data at address 0x3f040000 loaded by linux.&lt;/P&gt;&lt;P&gt;I don't know very well what do you mean by set memory,you mean the memory configuration (size of DDR,OCRAM,and start position)?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 May 2015 10:32:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Problems-with-shared-memory-switching-between-cores-on/m-p/357410#M3671</guid>
      <dc:creator>SlaveToTime</dc:creator>
      <dc:date>2015-05-06T10:32:49Z</dc:date>
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