topic Re: SW Reset not working in Vybrid Processors

SW Reset not working

neilsmith — Thu, 11 Dec 2014 11:04:16 GMT

HI,

Trying to force a reset using the SRC Control Register, setting the SW_RST bit, doesn't seem to be successful, the micro doesn't restart and requires a power cycle. We have the M4 as the primary core and A5 as secondary.

Is there anything we are not doing - e.g. putting the micro in a particular state before setting the SW_RST bit?

Re: SW Reset not working

karina_valencia — Mon, 15 Dec 2014 22:57:31 GMT

timesyssupport can you help with this case?

Re: SW Reset not working

timesyssupport — Tue, 16 Dec 2014 15:29:50 GMT

Hello Neil,

Can you clarify your system environment please? What OS is running on each core?

Allow us time to review, as I am aware of commits against upstream Linux kernel addressing SW_RST for Vybrid.

Regards,

Timesys Support

Re: SW Reset not working

neilsmith — Tue, 23 Dec 2014 09:38:18 GMT

Hi, thanks for the responses.

Happy to report it is now working, since we added some new bootloader code - i think the problem wasn't in the reset, it was in our startup code.

Cheers