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    <title>topic Re: Pin termination DDR CKE in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228876#M294</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Naoum,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 01 Aug 2013 01:46:22 GMT</pubDate>
    <dc:creator>keisukewatanabe</dc:creator>
    <dc:date>2013-08-01T01:46:22Z</dc:date>
    <item>
      <title>Pin termination DDR CKE</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228874#M292</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear support,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the page 67 of data sheet, there is a note "CKE pin has a external weak pull down requirement."&lt;/P&gt;&lt;P&gt;But we can not find such part(s) in the reference circuit. Is the pull down resister really necessary?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jul 2013 01:23:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228874#M292</guid>
      <dc:creator>keisukewatanabe</dc:creator>
      <dc:date>2013-07-30T01:23:26Z</dc:date>
    </item>
    <item>
      <title>Re: Pin termination DDR CKE</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228875#M293</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Keisuke,&lt;/P&gt;&lt;P&gt;You will find the answer in the following discussion: &lt;A _jive_internal="true" href="https://community.nxp.com/thread/310156"&gt;https://community.freescale.com/thread/310156&lt;/A&gt;.&lt;/P&gt;&lt;P&gt;Regards, Naoum Gitnik.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jul 2013 19:23:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228875#M293</guid>
      <dc:creator>naoumgitnik</dc:creator>
      <dc:date>2013-07-30T19:23:32Z</dc:date>
    </item>
    <item>
      <title>Re: Pin termination DDR CKE</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228876#M294</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Naoum,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Keisuke&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Aug 2013 01:46:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Pin-termination-DDR-CKE/m-p/228876#M294</guid>
      <dc:creator>keisukewatanabe</dc:creator>
      <dc:date>2013-08-01T01:46:22Z</dc:date>
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