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    <title>topic Re: MAC-NET not sending eth frames in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310222#M2912</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Just in case someone finds him/herself in this situation, my problem was that the MMU had been activated and I was passing virtual addresses to the MAC-NET. The moment I passed the physical addresses it started working.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A colleague says the Vybrid USB controller did something similar because of alignment problems, so in general, looks like the module-private DMA engines have this tendency to just sit there if there is any problem with their work parameters. For the MAC-NET case, I expected at the very least that the EIR[EBERR] bit would flag a problem with the DMA transaction (as its description says), but... no.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 10 Apr 2014 11:14:54 GMT</pubDate>
    <dc:creator>hmijail</dc:creator>
    <dc:date>2014-04-10T11:14:54Z</dc:date>
    <item>
      <title>MAC-NET not sending eth frames</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310220#M2910</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to use the MAC-NET core in the Vybrid uC in a TWR-VF65GS10 board (connected to a TWR-SER2 board). And I believe I have done everything that should be done to be able to send a random ethernet frame:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;clocks ungated and multiplexers set to use the external RMII clock,&lt;/LI&gt;&lt;LI&gt;IO pins configured and multiplexers set,&lt;/LI&gt;&lt;LI&gt;FIFO descriptors and buffers created and aligned with better-than-recommended alignment,&lt;/LI&gt;&lt;LI&gt;disabled ENET, set registers to my liking (store&amp;amp;forward, CRC added by MAC-NET, RMII mode)&lt;/LI&gt;&lt;LI&gt;initialized the PHY and set its registers to my liking,&lt;UL style="list-style-type: disc;"&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;got the PHY to autonegotiate and detect the link conditions forced by the other side and report good link,&lt;/LI&gt;&lt;LI&gt;fed back the negotiated speed to ENET,&lt;/LI&gt;&lt;LI&gt;re-enabled ENET,&lt;/LI&gt;&lt;LI&gt;prepared an ethernet frame into one of the buffers, set its flags,&lt;/LI&gt;&lt;LI&gt;and set ENET0-&amp;gt;TDAR = ENET_TDAR_TDAR_MASK.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I understand correctly, now DMA should take over and either send the frame or signal any error, and then set TDAR to 0.&lt;/P&gt;&lt;P&gt;But nothing is happening. TDAR stays ==1 indefinitely. No changes in EIR either. And Wireshark also doesn't see anything.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried using enhanced buffers and requested interrupt flags to see if any error flags appeared on their status fields. Nothing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried checking what the BSP does, and I don't see anything I could be missing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried different alignment sizes, either the minimum required ones or much bigger than recommended.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried ungating all the CCGR clocks just in case I was missing something..., setting the MII_SPEED in MSCR slower than necessary..., tried different sizes of ethernet frames, ... nothing happens.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;U-boot in the accelerometer demo boot disk does manage to ping the network, so the hardware is functional.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The RAM I am using is set to be non-cached.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anyone have any idea of what could be wrong?&lt;/P&gt;&lt;DIV style="width: 100%; height: 3px; position: absolute; left: 0px; background-color: blue; opacity: 0; z-index: 1000; top: 3px;"&gt; &lt;/DIV&gt;&lt;DIV style="width: 100%; height: 3px; position: absolute; left: 0px; background-color: blue; opacity: 1; z-index: 1000; top: 190px;"&gt; &lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Apr 2014 18:05:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310220#M2910</guid>
      <dc:creator>hmijail</dc:creator>
      <dc:date>2014-04-03T18:05:46Z</dc:date>
    </item>
    <item>
      <title>Re: MAC-NET not sending eth frames</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310221#M2911</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt; can you attend this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Apr 2014 18:37:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310221#M2911</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-04-07T18:37:50Z</dc:date>
    </item>
    <item>
      <title>Re: MAC-NET not sending eth frames</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310222#M2912</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Just in case someone finds him/herself in this situation, my problem was that the MMU had been activated and I was passing virtual addresses to the MAC-NET. The moment I passed the physical addresses it started working.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A colleague says the Vybrid USB controller did something similar because of alignment problems, so in general, looks like the module-private DMA engines have this tendency to just sit there if there is any problem with their work parameters. For the MAC-NET case, I expected at the very least that the EIR[EBERR] bit would flag a problem with the DMA transaction (as its description says), but... no.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Apr 2014 11:14:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/MAC-NET-not-sending-eth-frames/m-p/310222#M2912</guid>
      <dc:creator>hmijail</dc:creator>
      <dc:date>2014-04-10T11:14:54Z</dc:date>
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