topic Re: MQX Scatter Loading and GfxRAM in Vybrid Processors

MQX Scatter Loading and GfxRAM

ngsari — Wed, 28 May 2014 07:48:49 GMT

Hello Folks;

I want to use SysRAM0 + SysRam1 for Code and GfxRAM for Data

Is it posbile ?

I have changed scatter file and It does not work.
I can't figure out why ?

And one more thing, Is it posible to use SysRAM0 for both code and data ?

Thank you for everything.

#! armcc -E --cpu Cortex-A5.neon


#define CODE_BASE_ADDR_START    0x3f000000
#define CODE_BASE_ADDR_END      0x3f070000
#define CODE_SIZE               (CODE_BASE_ADDR_END - CODE_BASE_ADDR_START)


#define DATA_BASE_ADDR_START    0x3f410000
#define DATA_BASE_ADDR_END      0x3f470000
#define DATA_SIZE               (DATA_BASE_ADDR_END - DATA_BASE_ADDR_START)


#define DATA_SHARED_START       0x3f400000
#define DATA_SHARED_END         0x3f40fff0


#define BOOT_STACK_SIZE         0x100
#define FIQ_STACK_SIZE          0
#define ABT_STACK_SIZE          0
#define UND_STACK_SIZE          0
#define SYS_STACK_SIZE          0


LOAD_REGION_CODE CODE_BASE_ADDR_START
{


    BOOT +0
    {
        *(STARTUP)
    }
    
    CODE +0
    {
        * (InRoot$$Sections)      ; All library sections for example, __main.o,
                                  ; __scatter*.o, __dc*.o, and * Region$$Table
        * (KERNEL)
        * (TEXT)
        * (+RO)
    }
    
    DATA DATA_BASE_ADDR_START ALIGN 32 
    {
        * (+RW, +ZI)
    }


    ; FIQ stack
    FIQ_STACKS +0 ALIGN 8 EMPTY FIQ_STACK_SIZE {}
    ; ABT stack
    ABT_STACKS +0 ALIGN 8 EMPTY ABT_STACK_SIZE {}
    ; UND stack
    UND_STACKS +0 ALIGN 8 EMPTY UND_STACK_SIZE {}
    ; SYS stack
    SYS_STACKS +0 ALIGN 8 EMPTY SYS_STACK_SIZE {}


    KERNEL_DATA_START +0 ALIGN 16
    {
        * (KERNEL_DATA_START)     ; start of kernel data
        * (SRAM_POOL_START)
        * (UNCACHED_DATA_START)
    }


    KERNEL_DATA_END DATA_BASE_ADDR_END - (0x03*0x10)      ; RAM_END - 3 x aligned value with align 0x04 
    {
        * (SRAM_POOL_END)
        * (UNCACHED_DATA_END)
        * (KERNEL_DATA_END)     ; end of kernel data
    }

    SHARED_RAM_START DATA_SHARED_START EMPTY 0xfff0
    {
    }


    SHARED_RAM_END DATA_SHARED_END
    {
        *(SHARED_RAM_END)
    }
    
    ; mem_init writes a storeblock_struct at the end of kernel data,
    ; max size 32 bytes, so use 0x100 offset
   


    BOOT_STACK_ADDR (DATA_BASE_ADDR_END - BOOT_STACK_SIZE) OVERLAY
    {
        *(BOOT_STACK)
    }


    ; We don't use their stack or heap, but the tools expect this
    ; to be here, so we have a dummy placeholder.
    ARM_LIB_STACKHEAP (DATA_BASE_ADDR_END - 0x100) OVERLAY EMPTY UNINIT 0x04 
    {
    }
    
}

Re: MQX Scatter Loading and GfxRAM

karina_valencia — Fri, 30 May 2014 12:50:04 GMT

timesyssupport can you attend this case?

Re: MQX Scatter Loading and GfxRAM

timesyssupport — Tue, 03 Jun 2014 18:51:41 GMT

Hello,

I have tried using SysRAM0 for code and GfxRAM for data, and SysRAM0 for both code and data successfully. I tested with the "pingpong" example MCC application on the M4 core. In the first case, I specified 0x3f000000-0x3f02fff0 for code, and 0x3f400000-0x3f407ff0 for data; in the second case, I specified 0x3f000000-0x3f02fff0 for code, and 0x3f030000-0x3f037ff0 for data.

When you modified the scatter file - did you change the scatter file at FreescaleMQXRTOS4.0.2-GA/mqx/source/bsp/...? This is what I did, then cleaned all MQX projects (bsp, psp, application) and rebuilt.

Thanks,

Timesys Support

Re: MQX Scatter Loading and GfxRAM

jackblather — Thu, 11 Sep 2014 19:11:01 GMT

Is it possible to use gfxRAM to execute M4/MQX code?

Re: MQX Scatter Loading and GfxRAM

timesyssupport — Fri, 12 Sep 2014 22:04:40 GMT

Hi Jack,

I did not get a chance to try this today. I will try Monday and let you know how it goes.

Thanks,

Timesys Support

Re: MQX Scatter Loading and GfxRAM

jackblather — Fri, 12 Sep 2014 22:47:09 GMT

Thanks so much.

Re: MQX Scatter Loading and GfxRAM

timesyssupport — Mon, 15 Sep 2014 22:40:47 GMT

Hello Jack,

I was not able to fully run an MQX application in gfxram. IE, configuring the scatter file in this fashion did not work:

#define CODE_BASE_ADDR_START	0x3f400000
#define CODE_BASE_ADDR_END	0x3f43fff0
#define CODE_SIZE	(CODE_BASE_ADDR_END - CODE_BASE_ADDR_START)

#define DATA_BASE_ADDR_START	0x3f450000
#define DATA_BASE_ADDR_END	0x3f457ff0
#define DATA_SIZE	(DATA_BASE_ADDR_END - DATA_BASE_ADDR_START)

#define DATA_SHARED_START	0x3f440000
#define DATA_SHARED_END	0x3f44fff0

In order for the program to run, I needed to change DATA_SHARED_START and DATA_SHARED_END to be located in OCRAM.

Thanks, and let me know if you have any questions.

Timesys Support