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    <title>topic Re: About eDMA channel 0 in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300875#M2622</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Katsukura-san,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We recently became aware of this issue - it is possible for sport-&amp;gt;dma_tx_ch to be assigned channel 0, which results in the unintended operation you are experiencing. We will fix this in the next release of the kernel. You can change the conditional to check if 'sport-&amp;gt;dma_tx_ch &amp;lt; 0' for the meantime.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 25 Mar 2014 19:52:04 GMT</pubDate>
    <dc:creator>timesyssupport</dc:creator>
    <dc:date>2014-03-25T19:52:04Z</dc:date>
    <item>
      <title>About eDMA channel 0</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300873#M2620</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Forum members,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there any special meaning for eDMA channel 0?&lt;/P&gt;&lt;P&gt;We are using Timesys Linux and in their UART driver (mvf.c), following codes imply eDMA channel 0 has special meaning.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;(linux3.0/drivers/tty/serial/mvf.c&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_text_macro jive_macro_code _jivemacro_uid_13953796276484280" jivemacro_uid="_13953796276484280"&gt;
&lt;P&gt;static void imx_shutdown(struct uart_port *port)&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; struct imx_port *sport = (struct imx_port *)port;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned char temp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned long flags;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sport-&amp;gt;enable_dma) {&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* We have to wait for the DMA to finish. */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sport-&amp;gt;dma_tx_ch) {&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mcf_edma_stop_transfer(sport-&amp;gt;dma_tx_ch);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mcf_edma_free_channel(sport-&amp;gt;dma_tx_ch, sport);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; sport-&amp;gt;dma_tx_ch = 0;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;
&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Line 10 to 14 is not executed when UART uses DMA channel 0 (Because, sport-&amp;gt;dma_tx_ch is 0 ).&lt;/P&gt;&lt;P&gt;We think those are just a software bug, but we want to confirm that eDMA channel 0 has special meaning or not.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Makoto Katsukura&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Mar 2014 05:34:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300873#M2620</guid>
      <dc:creator>makotokatsukura</dc:creator>
      <dc:date>2014-03-21T05:34:02Z</dc:date>
    </item>
    <item>
      <title>Re: About eDMA channel 0</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300874#M2621</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt; can you attend this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Mar 2014 22:51:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300874#M2621</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-03-24T22:51:16Z</dc:date>
    </item>
    <item>
      <title>Re: About eDMA channel 0</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300875#M2622</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Katsukura-san,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We recently became aware of this issue - it is possible for sport-&amp;gt;dma_tx_ch to be assigned channel 0, which results in the unintended operation you are experiencing. We will fix this in the next release of the kernel. You can change the conditional to check if 'sport-&amp;gt;dma_tx_ch &amp;lt; 0' for the meantime.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Mar 2014 19:52:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300875#M2622</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2014-03-25T19:52:04Z</dc:date>
    </item>
    <item>
      <title>Re: About eDMA channel 0</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300876#M2623</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Timesys Support,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;the conditional to check if 'sport-&amp;gt;dma_tx_ch &amp;lt; 0'&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is it really?&lt;/P&gt;&lt;P&gt;We think if '&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;sport-&amp;gt;dma_tx_ch &amp;gt; 0' is the condition to check.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Please check it.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Makoto Katsukura&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Mar 2014 00:03:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300876#M2623</guid>
      <dc:creator>makotokatsukura</dc:creator>
      <dc:date>2014-03-27T00:03:53Z</dc:date>
    </item>
    <item>
      <title>Re: About eDMA channel 0</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300877#M2624</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Katsukura-san,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry, what I had posted was not correct before. This is the planned change:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sport-&amp;gt;enable_dma) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* We have to wait for the DMA to finish. */&lt;BR /&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sport-&amp;gt;dma_tx_ch) {&lt;BR /&gt;+&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sport-&amp;gt;dma_tx_ch &amp;gt;= 0) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mcf_edma_stop_transfer(sport-&amp;gt;dma_tx_ch);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; mcf_edma_free_channel(sport-&amp;gt;dma_tx_ch, sport);&lt;BR /&gt;-&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; sport-&amp;gt;dma_tx_ch = 0;&lt;BR /&gt;+&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; sport-&amp;gt;dma_tx_ch = -1;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks, and let me know if you have any questions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Apr 2014 18:48:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/About-eDMA-channel-0/m-p/300877#M2624</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2014-04-01T18:48:59Z</dc:date>
    </item>
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