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    <title>topic Re: Clearing SNVS Interrupts in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297994#M2571</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Well, actually it says except for &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.800000190734863px;"&gt;HPSVSR and LPSR&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.800000190734863px;"&gt;Hmm, anyway can you try enabling &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.800000190734863px;"&gt; SNVS_HPCOMR[NPSWA_EN]&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 27 Mar 2014 00:09:05 GMT</pubDate>
    <dc:creator>juangutierrez</dc:creator>
    <dc:date>2014-03-27T00:09:05Z</dc:date>
    <item>
      <title>Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297989#M2566</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Using the Vybrid Security Reference Manual (Rev 1, 5/2013) I've been able to write code to configure and setup SNVS for external and wire-mesh tamper events.&amp;nbsp; I'm able to force tamper and see the indicated in the SNVS_HPSVSR and SNVS_LPSR. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I enable security violations and setup the interrupts via SNVS_HPSICR and force a tamper event an interrupt will be generated to my software.&amp;nbsp; How do I clear the SNVS security violation interrupts?&amp;nbsp; (I've tried writing 0xFFFFFFFF to SNVS_LPSR &amp;amp; SNVS_HPSVSR with no luck.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ryan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Mar 2014 20:58:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297989#M2566</guid>
      <dc:creator>ryanm_</dc:creator>
      <dc:date>2014-03-17T20:58:00Z</dc:date>
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    <item>
      <title>Re: Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297990#M2567</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;My guess is that in order to be able to clear the status flag, you should first move to a non-secure mode or a soft-fail mode&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I found some code, where they are checking that the state is soft-fail and caam is in state mode before clearing the violation. But not sure exactly where the state is really moved&lt;/P&gt;&lt;P&gt;The reg32_read_test, seems to be just reading and comparing against the expected value, but not really writing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void snvs_sec_interrupt(void){&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; reg32_read_tst(SNVS_HPSR,&amp;nbsp;&amp;nbsp; 0x80000300,0xFFFFFFFF); // Moved to Soft-Fail&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; reg32_read_tst(CAAM_CSTA,&amp;nbsp;&amp;nbsp; 0x00000300,0x00000300); // CAAM in Fail Mode&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; reg32_read_tst(SNVS_LPSR,&amp;nbsp;&amp;nbsp; 0x40000000,0xFFFFFFFF);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; reg32clrbit&amp;nbsp;&amp;nbsp; (SNVS_HPCOMR, 9);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // clr fail security violation&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; // Probably move back to secure mode here&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; return;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope you find this info useful&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Mar 2014 21:03:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297990#M2567</guid>
      <dc:creator>juangutierrez</dc:creator>
      <dc:date>2014-03-19T21:03:16Z</dc:date>
    </item>
    <item>
      <title>Re: Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297991#M2568</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I tried adding the specified code to the interrupt handler to clear the interrupt and didn't have any luck with it clearing the interrupt.&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Mar 2014 15:45:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297991#M2568</guid>
      <dc:creator>ryanm_</dc:creator>
      <dc:date>2014-03-20T15:45:25Z</dc:date>
    </item>
    <item>
      <title>Re: Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297992#M2569</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/juangutierrez"&gt;juangutierrez&lt;/A&gt; can you continue with the follow up?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Mar 2014 18:31:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297992#M2569</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-03-26T18:31:21Z</dc:date>
    </item>
    <item>
      <title>Re: Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297993#M2570</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Privileged read/write accessible registers can only be accessed for read/write by privileged software. Unauthorized write accesses are ignored, and unauthorized read accesses return zero. Non-privileged software can access privileged access registers when the non-privileged software access enable bit is set in the SNVS _HP Command Register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In addition, all privileged access registers (except HPSVSR and LPSR) can be written to only if the system security monitor is in one of the three functional states:&lt;/P&gt;&lt;P&gt;• Non-Secure&lt;/P&gt;&lt;P&gt;• Trusted&lt;/P&gt;&lt;P&gt;• Secure&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So I guess you need to move to one of this states in order to be able to &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Try to Enable SNVS_HPCOMR[NPSWA_EN], so any software can access privileged registers, and see it that helps&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Mar 2014 00:07:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297993#M2570</guid>
      <dc:creator>juangutierrez</dc:creator>
      <dc:date>2014-03-27T00:07:18Z</dc:date>
    </item>
    <item>
      <title>Re: Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297994#M2571</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Well, actually it says except for &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.800000190734863px;"&gt;HPSVSR and LPSR&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.800000190734863px;"&gt;Hmm, anyway can you try enabling &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12.800000190734863px;"&gt; SNVS_HPCOMR[NPSWA_EN]&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Mar 2014 00:09:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297994#M2571</guid>
      <dc:creator>juangutierrez</dc:creator>
      <dc:date>2014-03-27T00:09:05Z</dc:date>
    </item>
    <item>
      <title>Re: Clearing SNVS Interrupts</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297995#M2572</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I was already setting the register "SNVS_HPCOMR[NPSWA_EN] = 1"&amp;nbsp; and it did not fix the issue.&amp;nbsp; My work around to the issue was to unregister for the interrupt.&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 19 Apr 2014 00:54:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Clearing-SNVS-Interrupts/m-p/297995#M2572</guid>
      <dc:creator>ryanm_</dc:creator>
      <dc:date>2014-04-19T00:54:44Z</dc:date>
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