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    <title>topic DCU bus priorization in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226785#M164</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Is there a possibility to increase the priority of the DCU on the bus ? Or is there a mechanism like QoS (quality of service) ?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;Holger&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 06 May 2013 16:41:38 GMT</pubDate>
    <dc:creator>snowholgi</dc:creator>
    <dc:date>2013-05-06T16:41:38Z</dc:date>
    <item>
      <title>DCU bus priorization</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226785#M164</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Is there a possibility to increase the priority of the DCU on the bus ? Or is there a mechanism like QoS (quality of service) ?&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;Holger&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 May 2013 16:41:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226785#M164</guid>
      <dc:creator>snowholgi</dc:creator>
      <dc:date>2013-05-06T16:41:38Z</dc:date>
    </item>
    <item>
      <title>Re: DCU bus priorization</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226786#M165</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DCU has fixed priority level on the bus ("hard-wired" in the manual).&lt;/P&gt;&lt;P&gt;Which part are you using? MPC5606S or MPC5645S?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Vincent&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 May 2013 09:56:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226786#M165</guid>
      <dc:creator>Aubineau_FAE</dc:creator>
      <dc:date>2013-05-07T09:56:49Z</dc:date>
    </item>
    <item>
      <title>Re: DCU bus priorization</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226787#M166</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm using Vybrid PVF65xxx.&lt;/P&gt;&lt;P&gt;After looking at the right place in documentation, I see that QoS is implemented in NIC301 and it has predefined values where DCU has level 14. So it looks like DCU has already highest priority on the bus.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Holger&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 May 2013 10:10:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/DCU-bus-priorization/m-p/226787#M166</guid>
      <dc:creator>snowholgi</dc:creator>
      <dc:date>2013-05-07T10:10:23Z</dc:date>
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