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    <title>topic Re: Vybrid Boot pin setting in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263584#M1439</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Shameem,&lt;/P&gt;&lt;P&gt;&amp;nbsp; See this thread for an explanation for the buffers: &lt;A href="https://community.nxp.com/message/338271"&gt;Re: Vybrid GPIO Boot override&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Anthony&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 10 Jul 2013 18:11:44 GMT</pubDate>
    <dc:creator>anthony_huereca</dc:creator>
    <dc:date>2013-07-10T18:11:44Z</dc:date>
    <item>
      <title>Vybrid Boot pin setting</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263583#M1438</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Dear Sir,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;In Freescale Tower system module, there is buffer used for isolation (see attachment) on Vybrid Boot setting pins.&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;But for other Freescale processor’s reference boards like i.MX53 QSB, i.MX6 SDB etc. usually resistor isolation only provided.&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Buffer is must or Is there any specific reason for using this buffer in Vybrid reference board?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Waiting for your valuable feedback.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Thank You, in advance.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Shameem&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jul 2013 06:32:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263583#M1438</guid>
      <dc:creator>AhmedShameemM_H</dc:creator>
      <dc:date>2013-07-10T06:32:47Z</dc:date>
    </item>
    <item>
      <title>Re: Vybrid Boot pin setting</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263584#M1439</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Shameem,&lt;/P&gt;&lt;P&gt;&amp;nbsp; See this thread for an explanation for the buffers: &lt;A href="https://community.nxp.com/message/338271"&gt;Re: Vybrid GPIO Boot override&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Anthony&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jul 2013 18:11:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263584#M1439</guid>
      <dc:creator>anthony_huereca</dc:creator>
      <dc:date>2013-07-10T18:11:44Z</dc:date>
    </item>
    <item>
      <title>Re: Vybrid Boot pin setting</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263585#M1440</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you , Anthony&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jul 2013 09:58:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/Vybrid-Boot-pin-setting/m-p/263585#M1440</guid>
      <dc:creator>AhmedShameemM_H</dc:creator>
      <dc:date>2013-07-23T09:58:50Z</dc:date>
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