Vybrid VF6 Memory Protection

neilfoss — Fri, 13 Dec 2013 10:52:41 GMT

Hi,

I'd like to prevent the A5 core from accessing memory areas belonging to the M4 core in the Vybrid VF6. Does anyone know how I'd go about doing this?

So far I can see that the M4 has a Memory Protection Unit but not the A5, otherwise I could have set it up and then protected the registers using the Central Security Unit

Any help appreciated

Thanks,

Neil

Re: Vybrid VF6 Memory Protection

kef2 — Fri, 13 Dec 2013 15:42:38 GMT

A5 has MMU. In MMU translation tables you can specify which areas are read only, which areas are XN (execute never) etc. Chapter B3 from ARM architecture manual may help understanding it:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406b/index.html

topic Vybrid VF6 Memory Protection in Vybrid Processors

Vybrid VF6 Memory Protection

Re: Vybrid VF6 Memory Protection