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    <title>topic Re: Re: SPI Support Redundant Boot? (Primary/Secondary Images) in Vybrid Processors</title>
    <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252564#M1062</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #575757; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;Hello Timesys Support,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #575757; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;Below is reply from the Vybrid chip design team:&lt;/SPAN&gt;&lt;SPAN style="color: #575757; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #339966; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;&lt;STRONG&gt;"SPI itself is a secondary boot interface. It does not support Redundant boot, i.e. If Primary image on SPI is corrupt, then BOOTROM will switch to serial download.&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;STRONG style="color: #339966; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt; The figure does not suggest that the SPI support redundant boot.&lt;/STRONG&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;SPAN style="color: #339966; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;&lt;STRONG&gt; Secondary image boot is supported only on SD/MMC and NAND."&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;SPAN style="font-family: arial, helvetica, sans-serif; font-size: 10pt; color: #575757;"&gt;Feel free to comment on it for the customer.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;SPAN style="font-family: arial, helvetica, sans-serif; font-size: 10pt; color: #575757;"&gt;Sincerely, Naoum Gitnik.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 28 Jan 2014 20:06:45 GMT</pubDate>
    <dc:creator>naoumgitnik</dc:creator>
    <dc:date>2014-01-28T20:06:45Z</dc:date>
    <item>
      <title>SPI Support Redundant Boot? (Primary/Secondary Images)</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252561#M1059</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In Tech Ref Figure 19-1 "Boot Flow" it seems to imply that SPI boot will support redundancy.&amp;nbsp; However, 19.4.8 indiactes it might not, PERSIST_SECONDARY_BOOT, "Used only for boot modes that support redundant boot."&amp;nbsp; Further, 19.5.5.6 says "The device ROM supports redundant boot for expansion device."&amp;nbsp; It APPEARS that "expansion device" is limited to SD/MMC which concerns me (SPI not included as an "expansion device").&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So...the question is, if I set RCON for SPI Boot and my primary image is corrupt (authentication fails), will it attempt to boot from the secondary SPI image?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, I can't find any mention of the authentication process itself.&amp;nbsp; Could you describe it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks, Chris&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="JA" style="font-family: TimesLTStd-Roman; font-size: 14pt;"&gt;&lt;SPAN lang="JA" style="font-family: TimesLTStd-Roman; font-size: 14pt;"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="JA" style="font-family: HelveticaLTStd-Roman; font-size: 8pt;"&gt;&lt;SPAN lang="JA" style="font-family: HelveticaLTStd-Roman; font-size: 8pt;"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Jan 2014 15:10:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252561#M1059</guid>
      <dc:creator>ChrisNielsen</dc:creator>
      <dc:date>2014-01-23T15:10:42Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Support Redundant Boot? (Primary/Secondary Images)</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252562#M1060</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt; can you help on this case?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Jan 2014 17:53:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252562#M1060</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-01-24T17:53:56Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Support Redundant Boot? (Primary/Secondary Images)</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252563#M1061</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;After reviewing the Vybrid reference manual and the above diagrams, it is not clear whether Vybrid supports redundant boot via SPI. SD/MMC and NAND are documented to use PERSIST_SECONDARY_BOOT - so "expansion device" may not be limited to just SD/MMC. Can a Freescale engineer confirm the behavior of PERSIST_SECONDARY_BOOT with SPI?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Jan 2014 22:30:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252563#M1061</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2014-01-24T22:30:54Z</dc:date>
    </item>
    <item>
      <title>Re: Re: SPI Support Redundant Boot? (Primary/Secondary Images)</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252564#M1062</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #575757; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;Hello Timesys Support,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #575757; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;Below is reply from the Vybrid chip design team:&lt;/SPAN&gt;&lt;SPAN style="color: #575757; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #339966; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;&lt;STRONG&gt;"SPI itself is a secondary boot interface. It does not support Redundant boot, i.e. If Primary image on SPI is corrupt, then BOOTROM will switch to serial download.&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;STRONG style="color: #339966; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt; The figure does not suggest that the SPI support redundant boot.&lt;/STRONG&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;SPAN style="color: #339966; font-size: 10pt; font-family: arial, helvetica, sans-serif;"&gt;&lt;STRONG&gt; Secondary image boot is supported only on SD/MMC and NAND."&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;SPAN style="font-family: arial, helvetica, sans-serif; font-size: 10pt; color: #575757;"&gt;Feel free to comment on it for the customer.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #282828; font-family: 'Segoe UI WPC', 'Segoe UI', Tahoma, 'Microsoft Sans Serif', Verdana, sans-serif; font-size: 15px;"&gt;&lt;SPAN style="font-family: arial, helvetica, sans-serif; font-size: 10pt; color: #575757;"&gt;Sincerely, Naoum Gitnik.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 Jan 2014 20:06:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252564#M1062</guid>
      <dc:creator>naoumgitnik</dc:creator>
      <dc:date>2014-01-28T20:06:45Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Support Redundant Boot? (Primary/Secondary Images)</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252565#M1063</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/timesyssupport"&gt;timesyssupport&lt;/A&gt; please&amp;nbsp; continue with the follow up.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 Jan 2014 16:18:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252565#M1063</guid>
      <dc:creator>karina_valencia</dc:creator>
      <dc:date>2014-01-31T16:18:41Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Support Redundant Boot? (Primary/Secondary Images)</title>
      <link>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252566#M1064</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Naoum Gitnik confirmed that the SPI interface does not support Redundant boot - this boot mode is only supported on SD/MCC and NAND. We have no further comments on this.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Timesys Support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 Jan 2014 16:45:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Vybrid-Processors/SPI-Support-Redundant-Boot-Primary-Secondary-Images/m-p/252566#M1064</guid>
      <dc:creator>timesyssupport</dc:creator>
      <dc:date>2014-01-31T16:45:13Z</dc:date>
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