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    <title>Embedded Software and Tools ClinicのトピックS32K324 Hardfault on CM7_1</title>
    <link>https://community.nxp.com/t5/Embedded-Software-and-Tools/S32K324-Hardfault-on-CM7-1/m-p/1764964#M433</link>
    <description>&lt;P&gt;I'm using an NXP S32K324 (dual core) MCU with Vector AUTOSAR + NXP-MCAL (RTD) + GreenHils Compiler + WinIDEA (IC5000) debugger &amp;amp; IDE.&lt;BR /&gt;The controller is started with boot-configuration-word set to 1 [CM7_0 enabled, CM7_1 disabled].&lt;BR /&gt;And from the Vector application code, second core (CM7_1) is started.&lt;BR /&gt;Per AUTOSAR startup requirements, it is required that CM7_0 waits for CM7_1 to complete booting up before RTE started in CM7_0.&lt;BR /&gt;This is partly part of the Vector SW synchronization process during Os_Init().&lt;/P&gt;&lt;P&gt;Here are the SW configuration used:&lt;BR /&gt;1. Use a common exception vector table for both cores during startup (which is provided as part of NXP MCAL RTD code). Meaning: VTOR of CM7_0 &amp;amp; CM7_1 would be the same while starting up.&lt;BR /&gt;2. When application starts, depending on the core-ID, Os_Init() assigns VTOR of each core with separate vector table base address generted by Vector OS code&lt;/P&gt;&lt;P&gt;For the above project, We have both cores up and running when we are connected over debugger.&lt;BR /&gt;But when the ECU is let to run from a Power-on-Reset after disconnecting debugger, it shows the following behavior:&lt;BR /&gt;* CM7_0 starts and waits in Vector application code for CM7_1 to complete boot-up&lt;BR /&gt;* CM7_1 does not finish boot-up, but remains trapped in a Hardfault (forced-hardfault) exception&lt;/P&gt;&lt;P&gt;When we hot-connect to the S32K324 after Power-on-Reset, have the following observations:&lt;BR /&gt;a) It is noticed that the CM7_1 core does not execute any expressions written as part of the main()&lt;BR /&gt;b) However, it is noted that the CM7_1 debug shows it is trapped in HardFault exception as part of OS's Interrupt Vector Table&lt;BR /&gt;c) VTOR register of CM7_1 has the base address of interrupt-vector-table generated in Vector code for CM7_1&lt;BR /&gt;d) But the above behavior observed is in violation of point (a) mentioned above. Because if SW control of CM7_1 does not reach main(), then there is no way for an OS initialization [Os_Init()] to occur &amp;amp; VTOR of CM7_1 to have OS's interrupt-vector-table base address.&lt;/P&gt;&lt;P&gt;Right now, since CM7_1 does not seem to execute the main(), the situation is that it does not let us enable any other fault exceptions to root-cause the issue.&lt;BR /&gt;And having the debugger connected does not show the issue.&lt;/P&gt;&lt;P&gt;Is this something that anybody in this forum has experienced?&lt;BR /&gt;Any help to root-cause the issue would be helpful.&lt;/P&gt;&lt;P&gt;Thanks !!&lt;/P&gt;</description>
    <pubDate>Tue, 28 Nov 2023 13:58:16 GMT</pubDate>
    <dc:creator>jeevanthomas</dc:creator>
    <dc:date>2023-11-28T13:58:16Z</dc:date>
    <item>
      <title>S32K324 Hardfault on CM7_1</title>
      <link>https://community.nxp.com/t5/Embedded-Software-and-Tools/S32K324-Hardfault-on-CM7-1/m-p/1764964#M433</link>
      <description>&lt;P&gt;I'm using an NXP S32K324 (dual core) MCU with Vector AUTOSAR + NXP-MCAL (RTD) + GreenHils Compiler + WinIDEA (IC5000) debugger &amp;amp; IDE.&lt;BR /&gt;The controller is started with boot-configuration-word set to 1 [CM7_0 enabled, CM7_1 disabled].&lt;BR /&gt;And from the Vector application code, second core (CM7_1) is started.&lt;BR /&gt;Per AUTOSAR startup requirements, it is required that CM7_0 waits for CM7_1 to complete booting up before RTE started in CM7_0.&lt;BR /&gt;This is partly part of the Vector SW synchronization process during Os_Init().&lt;/P&gt;&lt;P&gt;Here are the SW configuration used:&lt;BR /&gt;1. Use a common exception vector table for both cores during startup (which is provided as part of NXP MCAL RTD code). Meaning: VTOR of CM7_0 &amp;amp; CM7_1 would be the same while starting up.&lt;BR /&gt;2. When application starts, depending on the core-ID, Os_Init() assigns VTOR of each core with separate vector table base address generted by Vector OS code&lt;/P&gt;&lt;P&gt;For the above project, We have both cores up and running when we are connected over debugger.&lt;BR /&gt;But when the ECU is let to run from a Power-on-Reset after disconnecting debugger, it shows the following behavior:&lt;BR /&gt;* CM7_0 starts and waits in Vector application code for CM7_1 to complete boot-up&lt;BR /&gt;* CM7_1 does not finish boot-up, but remains trapped in a Hardfault (forced-hardfault) exception&lt;/P&gt;&lt;P&gt;When we hot-connect to the S32K324 after Power-on-Reset, have the following observations:&lt;BR /&gt;a) It is noticed that the CM7_1 core does not execute any expressions written as part of the main()&lt;BR /&gt;b) However, it is noted that the CM7_1 debug shows it is trapped in HardFault exception as part of OS's Interrupt Vector Table&lt;BR /&gt;c) VTOR register of CM7_1 has the base address of interrupt-vector-table generated in Vector code for CM7_1&lt;BR /&gt;d) But the above behavior observed is in violation of point (a) mentioned above. Because if SW control of CM7_1 does not reach main(), then there is no way for an OS initialization [Os_Init()] to occur &amp;amp; VTOR of CM7_1 to have OS's interrupt-vector-table base address.&lt;/P&gt;&lt;P&gt;Right now, since CM7_1 does not seem to execute the main(), the situation is that it does not let us enable any other fault exceptions to root-cause the issue.&lt;BR /&gt;And having the debugger connected does not show the issue.&lt;/P&gt;&lt;P&gt;Is this something that anybody in this forum has experienced?&lt;BR /&gt;Any help to root-cause the issue would be helpful.&lt;/P&gt;&lt;P&gt;Thanks !!&lt;/P&gt;</description>
      <pubDate>Tue, 28 Nov 2023 13:58:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Embedded-Software-and-Tools/S32K324-Hardfault-on-CM7-1/m-p/1764964#M433</guid>
      <dc:creator>jeevanthomas</dc:creator>
      <dc:date>2023-11-28T13:58:16Z</dc:date>
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