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    <title>topic Re: T2080RDB: vxWorks SMP boot problem from UBoot in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504845#M875</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Elsa,&lt;/P&gt;&lt;P&gt;Thanks for the reply...&lt;/P&gt;&lt;P&gt;Sorry for the delayed response...&lt;/P&gt;&lt;P&gt;We are using the default bsp supplied by WR. &lt;/P&gt;&lt;P&gt;Do you mean that stock bsp does not support&amp;nbsp; VxW SMP from UBoot?&lt;/P&gt;&lt;P&gt;FYI,&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;VxW SMP is booting from VxW bootrom without any fail&lt;/STRONG&gt;.&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;Problem is in booting VxW SMP from the UBoot.&lt;/STRONG&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Please help me to get answer for the following two queries,&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Should I add something in bsp to help VxW SMP Image to boot from UBoot?&lt;/LI&gt;&lt;LI&gt;target.ref of bsp explains how VxW bootrom can be booted from NOR Flash. But I want to boot VxW bootrom from NAND Flash of T2080RDB.How can I do the same on T2080RDB?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Thanks&amp;amp;Regards&lt;/P&gt;&lt;P&gt;Flaby&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 08 Jun 2016 07:20:23 GMT</pubDate>
    <dc:creator>flabyjacob</dc:creator>
    <dc:date>2016-06-08T07:20:23Z</dc:date>
    <item>
      <title>T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504840#M870</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;We are booting vxWorks from UBoot.&lt;/P&gt;&lt;P&gt;After enabling SMP options with windriver workbench, vxWorks is failing to enable logical CPU2 onwards(CPU2,CPU3,CPU4...).&lt;/P&gt;&lt;P&gt;Logical CPU0 and CPU1 are getting initialized successfully.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline; color: #3a0699;"&gt;&lt;SPAN style="text-decoration: underline;"&gt;Please note,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline; color: #3a0699;"&gt;&lt;SPAN style="text-decoration: underline;"&gt;The above discussed problem does not happen when vxWorks SMP is booted from 'vxWorks bootrom'&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can somebody help me to understand which configuration in UBoot makes vxWorks SMP to fail on T2080RDB EVM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Flaby&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Apr 2016 06:43:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504840#M870</guid>
      <dc:creator>flabyjacob</dc:creator>
      <dc:date>2016-04-14T06:43:15Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504841#M871</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A _jive_internal="true" data-content-finding="Community" data-userid="263534" data-username="flabyjacob" href="https://community.nxp.com/people/flabyjacob"&gt;F&lt;/A&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;laby Jacob,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;I am not familiar with WindRiver Vxworks, would you please provide the console log (including u-boot) to provide us some prompt information?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;In addition, do you use the default u-boot from NXP released Linux SDK?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;For boot Linux with u-boot, CPUs related parameters need to be defined in the dts file to pass to the boot loader when booting Linux. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;In your Wxworks image, has the information related with logical CPU2 been defined? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yiping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Apr 2016 12:14:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504841#M871</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2016-04-20T12:14:48Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504842#M872</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping,&lt;/P&gt;&lt;P&gt;Thanks a lot...&lt;/P&gt;&lt;P&gt;Sorry for the delayed response...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;I have attached the log (UBoot &amp;amp; vxWorks)&lt;/LI&gt;&lt;LI&gt;Yes, we are using default UBoot programmed in NOR Flash of T2080RDB&lt;/LI&gt;&lt;LI&gt;I am not that familiar to vxWorks source code. I will check it and get back to you&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Flaby&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Apr 2016 05:58:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504842#M872</guid>
      <dc:creator>flabyjacob</dc:creator>
      <dc:date>2016-04-22T05:58:50Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504843#M873</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry Yiping,&lt;/P&gt;&lt;P&gt;I missed attachment in the last reply&lt;/P&gt;&lt;P&gt;Please find it here&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;U-Boot 2015.01QorIQ-SDK-V1.8+g6ba8eed (Jun 14 2015 - 06:33:44)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CPU0:&amp;nbsp; T2080E, Version: 1.1, (0x85380011)&lt;/P&gt;&lt;P&gt;Core:&amp;nbsp; e6500, Version: 2.0, (0x80400120)&lt;/P&gt;&lt;P&gt;Clock Configuration:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU0:1799.820 MHz, CPU1:1799.820 MHz, CPU2:1799.820 MHz, CPU3:1799.820 MHz, &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CCB:599.940 MHz,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR:933.310 MHz (1866.620 MT/s data rate) (Asynchronous), IFC:149.985 MHz&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; FMAN1: 699.930 MHz&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; QMAN:&amp;nbsp; 299.970 MHz&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; PME:&amp;nbsp;&amp;nbsp; 599.940 MHz&lt;/P&gt;&lt;P&gt;L1:&amp;nbsp;&amp;nbsp;&amp;nbsp; D-cache 32 KiB enabled&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I-cache 32 KiB enabled&lt;/P&gt;&lt;P&gt;Reset Configuration Word (RCW):&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000000: 1207001b 15000000 00000000 00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000010: 66150002 00000000 ec027000 c1000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000020: 00800000 00000000 00000000 000307fc&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000030: 00000000 00000000 00000000 00000004&lt;/P&gt;&lt;P&gt;Board: T2080RDB, Board rev: 0x01 CPLD ver: 0x03, boot from NOR vBank0&lt;/P&gt;&lt;P&gt;SERDES Reference Clocks:&lt;/P&gt;&lt;P&gt;SD1_CLK1=156.25MHZ, SD1_CLK2=100.00MHZ&lt;/P&gt;&lt;P&gt;SD2_CLK1=100.00MHZ, SD2_CLK2=100.00MHZ&lt;/P&gt;&lt;P&gt;I2C:&amp;nbsp;&amp;nbsp; ready&lt;/P&gt;&lt;P&gt;SPI:&amp;nbsp;&amp;nbsp; ready&lt;/P&gt;&lt;P&gt;DRAM:&amp;nbsp; Initializing....using SPD&lt;/P&gt;&lt;P&gt;Detected UDIMM D3XP56082XL10AA&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;2 GiB left unmapped&lt;/P&gt;&lt;P&gt;4 GiB (DDR3, 64-bit, CL=13, ECC on)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DDR Chip-Select Interleaving Mode: CS0+CS1&lt;/P&gt;&lt;P&gt;VID: Could not find voltage regulator on I2C.&lt;/P&gt;&lt;P&gt;Warning: Adjusting core voltage failed.&lt;/P&gt;&lt;P&gt;Flash: 128 MiB&lt;/P&gt;&lt;P&gt;L2:&amp;nbsp;&amp;nbsp;&amp;nbsp; 2 MiB enabled&lt;/P&gt;&lt;P&gt;Corenet Platform Cache: 512 KiB enabled&lt;/P&gt;&lt;P&gt;Using SERDES1 Protocol: 102 (0x66)&lt;/P&gt;&lt;P&gt;Using SERDES2 Protocol: 21 (0x15)&lt;/P&gt;&lt;P&gt;SEC0: RNG instantiated&lt;/P&gt;&lt;P&gt;NAND:&amp;nbsp; 512 MiB&lt;/P&gt;&lt;P&gt;MMC:&amp;nbsp;&amp;nbsp; FSL_SDHC: 0&lt;/P&gt;&lt;P&gt;EEPROM: Invalid ID (ff ff ff ff)&lt;/P&gt;&lt;P&gt;PCIe1: Endpoint, undetermined, regs @ 0xfe240000&lt;/P&gt;&lt;P&gt;PCIe1: Bus 00 - 00&lt;/P&gt;&lt;P&gt;PCIe2: Root Complex, x2 gen2, regs @ 0xfe250000&lt;/P&gt;&lt;P&gt;&amp;nbsp; 02:00.0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; - 1957:0808 - Processor&lt;/P&gt;&lt;P&gt;PCIe2: Bus 01 - 02&lt;/P&gt;&lt;P&gt;PCIe3: disabled&lt;/P&gt;&lt;P&gt;PCIe4: Root Complex, no link, regs @ 0xfe270000&lt;/P&gt;&lt;P&gt;PCIe4: Bus 03 - 03&lt;/P&gt;&lt;P&gt;In:&amp;nbsp;&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Out:&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Err:&amp;nbsp;&amp;nbsp; serial&lt;/P&gt;&lt;P&gt;Net:&amp;nbsp;&amp;nbsp; Fman1: Uploading microcode version 106.4.15&lt;/P&gt;&lt;P&gt;PHY reset timed out&lt;/P&gt;&lt;P&gt;PHY reset timed out&lt;/P&gt;&lt;P&gt;FM1@DTSEC3, FM1@DTSEC4 [PRIME], FM1@TGEC1, FM1@TGEC2, FM1@TGEC3, FM1@TGEC4&lt;/P&gt;&lt;P&gt;Hit any key to stop autoboot:&amp;nbsp; 3&amp;nbsp; 2&amp;nbsp; 0 &lt;/P&gt;&lt;P&gt;=&amp;gt; setenv bootargs 'memac(2,0)host:vxWorks h=200.168.1.13 e=200.168.1.14 u=vxworks pw=vxworks f=0x0'&lt;/P&gt;&lt;P&gt;=&amp;gt; tftp vxWorks&lt;/P&gt;&lt;P&gt;Using FM1@DTSEC4 device&lt;/P&gt;&lt;P&gt;TFTP from server 200.168.1.13; our IP address is 200.168.1.14&lt;/P&gt;&lt;P&gt;Filename 'vxWorks'.&lt;/P&gt;&lt;P&gt;Load address: 0x1000000&lt;/P&gt;&lt;P&gt;Loading: *#################################################################&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; #################################################################&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; #################################################################&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ##################################&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 5.2 MiB/s&lt;/P&gt;&lt;P&gt;done&lt;/P&gt;&lt;P&gt;Bytes transferred = 3358176 (333de0 hex)&lt;/P&gt;&lt;P&gt;=&amp;gt; bootv&lt;/P&gt;&lt;P&gt;## Ethernet MAC address not copied to NV RAM&lt;/P&gt;&lt;P&gt;## Using bootline (@ 0x4200): memac(2,0)host:vxWorks h=200.168.1.13 e=200.168.1.14 u=vxworks pw=vxworks f=0x0&lt;/P&gt;&lt;P&gt;## Starting vxWorks at 0x00100000 ...&lt;/P&gt;&lt;P&gt;Target Name: vxTarget &lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82a5dd0&lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82a9430&lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): usrEnableCpu: error when enabling additional CPU: 2&lt;/P&gt;&lt;P&gt;userEnableCpu: kernelCpuEnableInternal() failed&lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82aca90&lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): Error: CPU2 must be enabled before CPU3&lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): usrEnableCpu: error when enabling additional CPU: 3&lt;/P&gt;&lt;P&gt;userEnableCpu: kernelCpuEnableInternal() failed&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Add0xing 82c36407342 ( symbols for standalone.&lt;/P&gt;&lt;P&gt;tRootTask): kernelCpuEnableInternal: pExcStackBase : 0x82b00f0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; VxW0xorks82c3640&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; (CopyritRootTaskght 1984-): 2016usrEnableCpu: error wh&amp;nbsp; Wind River Systems, en enabling additionalInc.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; CPU:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 4 CPU: &lt;/P&gt;&lt;P&gt;userEnableCpu: kernelCpuEnableInternalFreescale QorIQ T2080()&lt;/P&gt;&lt;P&gt; failed&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Runtime Name: 0xVxWorks82c3640&lt;/P&gt;&lt;P&gt; ( RutRootTaskntime Version:):&amp;nbsp; kernelCpuEnableIntern6.9 SMPal: pExcStackBas&lt;/P&gt;&lt;P&gt;e :&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; BSP version: 6.9/0&lt;/P&gt;&lt;P&gt;0x&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Created:82b3750 &lt;/P&gt;&lt;P&gt;Apr 13 2016 20:00x8:2682c3640&lt;/P&gt;&lt;P&gt; (ED&amp;amp;R Politcy Mode: RootTaskDepl): oyedError: CPU&lt;/P&gt;&lt;P&gt;4&amp;nbsp;&amp;nbsp; WDB&amp;nbsp; Comm Type: must be WDB_COMM_ENDenabled bef&lt;/P&gt;&lt;P&gt;ore CPU&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; W5DB: &lt;/P&gt;&lt;P&gt;Agent Disabled.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;0x82c3640 (tRootTask): usrEnableCpu: error when enabling additional CPU: 5&lt;/P&gt;&lt;P&gt;userEnableCpu: kernelCpuEnableInternal() failed&lt;/P&gt;&lt;P&gt;0x82c3640 (): task dead&lt;/P&gt;&lt;P&gt;usrEnableCpu: error when enabling additional CPU: 7&lt;/P&gt;&lt;P&gt;userEnableCpu: kernelCpuEnableInternal() failed&lt;/P&gt;&lt;P&gt;-&amp;gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Apr 2016 11:48:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504843#M873</guid>
      <dc:creator>flabyjacob</dc:creator>
      <dc:date>2016-04-22T11:48:00Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504844#M874</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;So Flaby, you were able to get VxW to boot via bootrom on the version 3 of the T2080RDB it appears?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Are you using the 'stock' BSP from Wind River for 6.9.4 or do you have a modified one?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From what I can tell, the one WR has posted does not support the T2080 V1.1 silicon without making some changes.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Apr 2016 20:22:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504844#M874</guid>
      <dc:creator>elsasnow</dc:creator>
      <dc:date>2016-04-22T20:22:44Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504845#M875</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Elsa,&lt;/P&gt;&lt;P&gt;Thanks for the reply...&lt;/P&gt;&lt;P&gt;Sorry for the delayed response...&lt;/P&gt;&lt;P&gt;We are using the default bsp supplied by WR. &lt;/P&gt;&lt;P&gt;Do you mean that stock bsp does not support&amp;nbsp; VxW SMP from UBoot?&lt;/P&gt;&lt;P&gt;FYI,&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;VxW SMP is booting from VxW bootrom without any fail&lt;/STRONG&gt;.&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;Problem is in booting VxW SMP from the UBoot.&lt;/STRONG&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Please help me to get answer for the following two queries,&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Should I add something in bsp to help VxW SMP Image to boot from UBoot?&lt;/LI&gt;&lt;LI&gt;target.ref of bsp explains how VxW bootrom can be booted from NOR Flash. But I want to boot VxW bootrom from NAND Flash of T2080RDB.How can I do the same on T2080RDB?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Thanks&amp;amp;Regards&lt;/P&gt;&lt;P&gt;Flaby&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jun 2016 07:20:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504845#M875</guid>
      <dc:creator>flabyjacob</dc:creator>
      <dc:date>2016-06-08T07:20:23Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504846#M876</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Our problems lie with the BSP.&amp;nbsp; We suspect that it does not support V1.1 and the DDR3 SoDIMM used on Rev C of the T2080RDB.&lt;/P&gt;&lt;P&gt;It looks like your boot log shows this actually working, which is surprising.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regarding boot, WRS has directed me to use a VxW bootrom instead of U-Boot.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Jun 2016 12:18:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504846#M876</guid>
      <dc:creator>elsasnow</dc:creator>
      <dc:date>2016-06-08T12:18:06Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504847#M877</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to boot linux on my custom board(T2080RDB based) I am using the uImage binary, dtb file and rootfs suppiled by the SDK-v1.8 for booting,&lt;/P&gt;&lt;P&gt;Should I disable/enable something in the kernel/rootfs before booting them from the custom board?&lt;/P&gt;&lt;P&gt;With the SDK supplied files, booting hangs. Please see the log,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/*******************************************************************************************************************************************************/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Linux version 3.12.37-rt51-QorIQ-SDK-V1.8+gf488de6 (jenkins@ceres) (gcc version 4.9.2 (GCC) ) #1 SMP Sun Jun 14 06:35:49 CST 2015&lt;/P&gt;&lt;P&gt;CF000012&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Setup Arch&lt;/P&gt;&lt;P&gt;[boot]0012 Setup Arch&lt;/P&gt;&lt;P&gt;CoreNet Generic board from Freescale Semiconductor&lt;/P&gt;&lt;P&gt;Zone ranges:&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; [mem 0x00000000-0x7fffffff]&lt;/P&gt;&lt;P&gt;&amp;nbsp; Normal&amp;nbsp;&amp;nbsp; empty&lt;/P&gt;&lt;P&gt;Movable zone start for each node&lt;/P&gt;&lt;P&gt;Early memory node ranges&lt;/P&gt;&lt;P&gt;&amp;nbsp; node&amp;nbsp;&amp;nbsp; 0: [mem 0x00000000-0x7fffffff]&lt;/P&gt;&lt;P&gt;MMU: Allocated 2112 bytes of context maps for 255 contexts&lt;/P&gt;&lt;P&gt;CF000015&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Setup Done&lt;/P&gt;&lt;P&gt;[boot]0015 Setup Done&lt;/P&gt;&lt;P&gt;PERCPU: Embedded 11 pages/cpu @c000000002900000 s15104 r0 d29952 u131072&lt;/P&gt;&lt;P&gt;Built 1 zonelists in Zone order, mobility grouping on.&amp;nbsp; Total pages: 517120&lt;/P&gt;&lt;P&gt;Kernel command line: root=/dev/ram rw ramdisk_size=70000000 console=ttyS0,115200&lt;/P&gt;&lt;P&gt;PID hash table entries: 4096 (order: 3, 32768 bytes)&lt;/P&gt;&lt;P&gt;Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)&lt;/P&gt;&lt;P&gt;Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)&lt;/P&gt;&lt;P&gt;Sorting __ex_table...&lt;/P&gt;&lt;P&gt;Memory: 1870072K/2097152K available (7472K kernel code, 1100K rwdata, 2716K rodata, 320K init, 762K bss, 227080K reserved)&lt;/P&gt;&lt;P&gt;Hierarchical RCU implementation.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; RCU debugfs-based tracing is enabled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; CONFIG_RCU_FANOUT set to non-default value of 32&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; RCU restricting CPUs from NR_CPUS=24 to nr_cpu_ids=8.&lt;/P&gt;&lt;P&gt;NR_IRQS:512 nr_irqs:512 16&lt;/P&gt;&lt;P&gt;mpic: Setting up MPIC " OpenPIC&amp;nbsp; " version 1.2 at ffe040000, max 8 CPUs&lt;/P&gt;&lt;P&gt;mpic: ISU size: 512, shift: 9, mask: 1ff&lt;/P&gt;&lt;P&gt;mpic: Initializing for 512 sources&lt;/P&gt;&lt;P&gt;clocksource: timebase mult[112502a5] shift[23] registered&lt;/P&gt;&lt;P&gt;Console: colour dummy device 80x25&lt;/P&gt;&lt;P&gt;pid_max: default: 32768 minimum: 301&lt;/P&gt;&lt;P&gt;Mount-cache hash table entries: 256&lt;/P&gt;&lt;P&gt;mpic: requesting IPIs...&lt;/P&gt;&lt;P&gt;e6500 family performance monitor hardware support registered&lt;/P&gt;&lt;P&gt;Brought up 2 CPUs&lt;/P&gt;&lt;P&gt;devtmpfs: initialized&lt;/P&gt;&lt;P&gt;xor: measuring software checksum speed&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 8regs&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :&amp;nbsp; 2022.000 MB/sec&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 8regs_prefetch:&amp;nbsp; 1783.000 MB/sec&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 32regs&amp;nbsp;&amp;nbsp;&amp;nbsp; :&amp;nbsp; 1699.000 MB/sec&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 32regs_prefetch:&amp;nbsp; 1497.000 MB/sec&lt;/P&gt;&lt;P&gt;xor: using function: 8regs (2022.000 MB/sec)&lt;/P&gt;&lt;P&gt;NET: Registered protocol family 16&lt;/P&gt;&lt;P&gt;Found FSL PCI host bridge at 0x0000000ffe240000. Firmware bus number: 0-&amp;gt;0&lt;/P&gt;&lt;P&gt;PCI host bridge /pcie@ffe240000&amp;nbsp; ranges:&lt;/P&gt;&lt;P&gt; MEM 0x0000000c00000000..0x0000000c1fffffff -&amp;gt; 0x00000000e0000000 &lt;/P&gt;&lt;P&gt;&amp;nbsp; IO 0x0000000ff8000000..0x0000000ff800ffff -&amp;gt; 0x0000000000000000&lt;/P&gt;&lt;P&gt;/pcie@ffe240000: PCICSRBAR @ 0xdf000007&lt;/P&gt;&lt;P&gt;EDAC PCI0: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe240000.pcie' (INTERRUPT)&lt;/P&gt;&lt;P&gt;MPC85xx_edac acquired irq 20 for PCI Err&lt;/P&gt;&lt;P&gt;MPC85xx_edac PCI err registered&lt;/P&gt;&lt;P&gt;Found FSL PCI host bridge at 0x0000000ffe260000. Firmware bus number: 0-&amp;gt;0&lt;/P&gt;&lt;P&gt;PCI host bridge /pcie@ffe260000&amp;nbsp; ranges:&lt;/P&gt;&lt;P&gt; MEM 0x0000000c30000000..0x0000000c3fffffff -&amp;gt; 0x00000000e0000000 &lt;/P&gt;&lt;P&gt;&amp;nbsp; IO 0x0000000ff8020000..0x0000000ff802ffff -&amp;gt; 0x0000000000000000&lt;/P&gt;&lt;P&gt;/pcie@ffe260000: PCICSRBAR @ 0xff000007&lt;/P&gt;&lt;P&gt;EDAC PCI1: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe260000.pcie' (INTERRUPT)&lt;/P&gt;&lt;P&gt;MPC85xx_edac acquired irq 22 for PCI Err&lt;/P&gt;&lt;P&gt;MPC85xx_edac PCI err registered&lt;/P&gt;&lt;P&gt;Found FSL PCI host bridge at 0x0000000ffe270000. Firmware bus number: 0-&amp;gt;0&lt;/P&gt;&lt;P&gt;PCI host bridge /pcie@ffe270000&amp;nbsp; ranges:&lt;/P&gt;&lt;P&gt; MEM 0x0000000c40000000..0x0000000c4fffffff -&amp;gt; 0x00000000e0000000 &lt;/P&gt;&lt;P&gt;&amp;nbsp; IO 0x0000000ff8030000..0x0000000ff803ffff -&amp;gt; 0x0000000000000000&lt;/P&gt;&lt;P&gt;/pcie@ffe270000: PCICSRBAR @ 0xff000007&lt;/P&gt;&lt;P&gt;EDAC PCI2: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe270000.pcie' (INTERRUPT)&lt;/P&gt;&lt;P&gt;MPC85xx_edac acquired irq 23 for PCI Err&lt;/P&gt;&lt;P&gt;MPC85xx_edac PCI err registered&lt;/P&gt;&lt;P&gt;PCI: Probing PCI hardware&lt;/P&gt;&lt;P&gt;fsl-pci ffe240000.pcie: PCI host bridge to bus 0000:00&lt;/P&gt;&lt;P&gt;pci_bus 0000:00: root bus resource [io&amp;nbsp; 0x10000-0x1ffff] (bus address [0x0000-0xffff])&lt;/P&gt;&lt;P&gt;pci_bus 0000:00: root bus resource [mem 0xc00000000-0xc1fffffff] (bus address [0xe0000000-0xffffffff])&lt;/P&gt;&lt;P&gt;pci_bus 0000:00: root bus resource [bus 00]&lt;/P&gt;&lt;P&gt;pci 0000:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)&lt;/P&gt;&lt;P&gt;pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring&lt;/P&gt;&lt;P&gt;pci 0000:00:00.0: PCI bridge to [bus 01-ff]&lt;/P&gt;&lt;P&gt;fsl-pci ffe260000.pcie: PCI host bridge to bus 0001:00&lt;/P&gt;&lt;P&gt;pci_bus 0001:00: root bus resource [io&amp;nbsp; 0x21000-0x30fff] (bus address [0x0000-0xffff])&lt;/P&gt;&lt;P&gt;pci_bus 0001:00: root bus resource [mem 0xc30000000-0xc3fffffff] (bus address [0xe0000000-0xefffffff])&lt;/P&gt;&lt;P&gt;pci_bus 0001:00: root bus resource [bus 00]&lt;/P&gt;&lt;P&gt;pci 0001:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)&lt;/P&gt;&lt;P&gt;pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring&lt;/P&gt;&lt;P&gt;pci 0001:00:00.0: PCI bridge to [bus 01-ff]&lt;/P&gt;&lt;P&gt;fsl-pci ffe270000.pcie: PCI host bridge to bus 0002:00&lt;/P&gt;&lt;P&gt;pci_bus 0002:00: root bus resource [io&amp;nbsp; 0x32000-0x41fff] (bus address [0x0000-0xffff])&lt;/P&gt;&lt;P&gt;pci_bus 0002:00: root bus resource [mem 0xc40000000-0xc4fffffff] (bus address [0xe0000000-0xefffffff])&lt;/P&gt;&lt;P&gt;pci_bus 0002:00: root bus resource [bus 00]&lt;/P&gt;&lt;P&gt;pci 0002:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)&lt;/P&gt;&lt;P&gt;pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring&lt;/P&gt;&lt;P&gt;pci 0002:00:00.0: PCI bridge to [bus 01-ff]&lt;/P&gt;&lt;P&gt;pci 0000:00:00.0: PCI bridge to [bus 01]&lt;/P&gt;&lt;P&gt;pci 0000:00:00.0:&amp;nbsp;&amp;nbsp; bridge window [io&amp;nbsp; 0x10000-0x1ffff]&lt;/P&gt;&lt;P&gt;pci 0000:00:00.0:&amp;nbsp;&amp;nbsp; bridge window [mem 0xc00000000-0xc1fffffff]&lt;/P&gt;&lt;P&gt;pci 0001:00:00.0: PCI bridge to [bus 01]&lt;/P&gt;&lt;P&gt;pci 0001:00:00.0:&amp;nbsp;&amp;nbsp; bridge window [io&amp;nbsp; 0x21000-0x30fff]&lt;/P&gt;&lt;P&gt;pci 0001:00:00.0:&amp;nbsp;&amp;nbsp; bridge window [mem 0xc30000000-0xc3fffffff]&lt;/P&gt;&lt;P&gt;pci 0002:00:00.0: PCI bridge to [bus 01]&lt;/P&gt;&lt;P&gt;pci 0002:00:00.0:&amp;nbsp;&amp;nbsp; bridge window [io&amp;nbsp; 0x32000-0x41fff]&lt;/P&gt;&lt;P&gt;pci 0002:00:00.0:&amp;nbsp;&amp;nbsp; bridge window [mem 0xc40000000-0xc4fffffff]&lt;/P&gt;&lt;P&gt;bio: create slab &amp;lt;bio-0&amp;gt; at 0&lt;/P&gt;&lt;P&gt;raid6: altivecx1&amp;nbsp;&amp;nbsp; 603 MB/s&lt;/P&gt;&lt;P&gt;raid6: altivecx2&amp;nbsp; 1006 MB/s&lt;/P&gt;&lt;P&gt;raid6: altivecx4&amp;nbsp; 1662 MB/s&lt;/P&gt;&lt;P&gt;raid6: altivecx8&amp;nbsp; 1630 MB/s&lt;/P&gt;&lt;P&gt;raid6: int64x1&amp;nbsp;&amp;nbsp;&amp;nbsp; 282 MB/s&lt;/P&gt;&lt;P&gt;raid6: int64x2&amp;nbsp;&amp;nbsp;&amp;nbsp; 474 MB/s&lt;/P&gt;&lt;P&gt;raid6: int64x4&amp;nbsp;&amp;nbsp;&amp;nbsp; 729 MB/s&lt;/P&gt;&lt;P&gt;raid6: int64x8&amp;nbsp;&amp;nbsp;&amp;nbsp; 637 MB/s&lt;/P&gt;&lt;P&gt;raid6: using algorithm altivecx4 (1662 MB/s)&lt;/P&gt;&lt;P&gt;raid6: using intx1 recovery algorithm&lt;/P&gt;&lt;P&gt;vgaarb: loaded&lt;/P&gt;&lt;P&gt;SCSI subsystem initialized&lt;/P&gt;&lt;P&gt;usbcore: registered new interface driver usbfs&lt;/P&gt;&lt;P&gt;usbcore: registered new interface driver hub&lt;/P&gt;&lt;P&gt;usbcore: registered new device driver usb&lt;/P&gt;&lt;P&gt;pps_core: LinuxPPS API ver. 1 registered&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti &amp;lt;&lt;/SPAN&gt;&lt;A class="jive-link-email-small" href="mailto:giometti@linux.it"&gt;giometti@linux.it&lt;/A&gt;&lt;SPAN&gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;PTP clock support registered&lt;/P&gt;&lt;P&gt;EDAC MC: Ver: 3.0.0&lt;/P&gt;&lt;P&gt;Bman err interrupt handler present&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 0&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 1&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 2&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 3&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 4&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 5&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 6&lt;/P&gt;&lt;P&gt;Bman portal initialised, cpu 7&lt;/P&gt;&lt;P&gt;Bman portals initialised&lt;/P&gt;&lt;P&gt;Qman err interrupt handler present&lt;/P&gt;&lt;P&gt;QMan: Allocated lookup table at 8000000000000000, entry count 65537&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 0&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 1&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 2&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 3&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 4&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 5&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 6&lt;/P&gt;&lt;P&gt;Qman portal initialised, cpu 7&lt;/P&gt;&lt;P&gt;Qman portals initialised&lt;/P&gt;&lt;P&gt;Bman: BPID allocator includes range 32:32&lt;/P&gt;&lt;P&gt;Qman: FQID allocator includes range 256:512&lt;/P&gt;&lt;P&gt;Qman: FQID allocator includes range 32768:32768&lt;/P&gt;&lt;P&gt;Qman: CGRID allocator includes range 0:256&lt;/P&gt;&lt;P&gt;Qman: pool channel allocator includes range 1025:15&lt;/P&gt;&lt;P&gt;fsl-ifc ffe124000.localbus: Freescale Integrated Flash Controller&lt;/P&gt;&lt;P&gt;Switched to clocksource timebase&lt;/P&gt;&lt;P&gt;NET: Registered protocol family 2&lt;/P&gt;&lt;P&gt;TCP established hash table entries: 16384 (order: 6, 262144 bytes)&lt;/P&gt;&lt;P&gt;TCP bind hash table entries: 16384 (order: 6, 262144 bytes)&lt;/P&gt;&lt;P&gt;TCP: Hash tables configured (established 16384 bind 16384)&lt;/P&gt;&lt;P&gt;TCP: reno registered&lt;/P&gt;&lt;P&gt;UDP hash table entries: 1024 (order: 3, 32768 bytes)&lt;/P&gt;&lt;P&gt;UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)&lt;/P&gt;&lt;P&gt;NET: Registered protocol family 1&lt;/P&gt;&lt;P&gt;RPC: Registered named UNIX socket transport module.&lt;/P&gt;&lt;P&gt;RPC: Registered udp transport module.&lt;/P&gt;&lt;P&gt;RPC: Registered tcp transport module.&lt;/P&gt;&lt;P&gt;RPC: Registered tcp NFSv4.1 backchannel transport module.&lt;/P&gt;&lt;P&gt;Trying to unpack rootfs image as initramfs...&lt;/P&gt;&lt;P&gt;rootfs image is not initramfs (no cpio magic); looks like an initrd&lt;/P&gt;&lt;P&gt;Freeing initrd memory: 35640K (c00000002dd31000 - c00000002ffff000)&lt;/P&gt;&lt;P&gt;audit: initializing netlink socket (disabled)&lt;/P&gt;&lt;P&gt;type=2000 audit(1.360:1): initialized&lt;/P&gt;&lt;P&gt;HugeTLB registered 1 MB page size, pre-allocated 0 pages&lt;/P&gt;&lt;P&gt;HugeTLB registered 4 MB page size, pre-allocated 0 pages&lt;/P&gt;&lt;P&gt;HugeTLB registered 16 MB page size, pre-allocated 0 pages&lt;/P&gt;&lt;P&gt;HugeTLB registered 64 MB page size, pre-allocated 0 pages&lt;/P&gt;&lt;P&gt;HugeTLB registered 256 MB page size, pre-allocated 0 pages&lt;/P&gt;&lt;P&gt;HugeTLB registered 1 GB page size, pre-allocated 0 pages&lt;/P&gt;&lt;P&gt;NFS: Registering the id_resolver key type&lt;/P&gt;&lt;P&gt;Key type id_resolver registered&lt;/P&gt;&lt;P&gt;Key type id_legacy registered&lt;/P&gt;&lt;P&gt;NTFS driver 2.1.30 [Flags: R/O].&lt;/P&gt;&lt;P&gt;jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.&lt;/P&gt;&lt;P&gt;msgmni has been set to 3850&lt;/P&gt;&lt;P&gt;io scheduler noop registered&lt;/P&gt;&lt;P&gt;io scheduler deadline registered&lt;/P&gt;&lt;P&gt;io scheduler cfq registered (default)&lt;/P&gt;&lt;P&gt;Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled&lt;/P&gt;&lt;P&gt;serial8250.0: ttyS0 at MMIO 0xffe11c500 (irq = 36, base_baud = 14581875) is a 16550A&lt;/P&gt;&lt;P&gt;console [ttyS0] enabled, bootconsole disabled&lt;/P&gt;&lt;P&gt;console [ttyS0] enabled, bootconsole disabled&lt;/P&gt;&lt;P&gt;serial8250.0: ttyS1 at MMIO 0xffe11c600 (irq = 36, base_baud = 14581875) is a 16550A&lt;/P&gt;&lt;P&gt;serial8250.0: ttyS2 at MMIO 0xffe11d500 (irq = 37, base_baud = 14581875) is a 16550A&lt;/P&gt;&lt;P&gt;serial8250.0: ttyS3 at MMIO 0xffe11d600 (irq = 37, base_baud = 14581875) is a 16550A&lt;/P&gt;&lt;P&gt;ePAPR hypervisor byte channel driver&lt;/P&gt;&lt;P&gt;brd: module loaded&lt;/P&gt;&lt;P&gt;loop: module loaded&lt;/P&gt;&lt;P&gt;st: Version 20101219, fixed bufsize 32768, s/g segs 256&lt;/P&gt;&lt;P&gt;fsl-sata ffe220000.sata: Sata FSL Platform/CSB Driver init&lt;/P&gt;&lt;P&gt;scsi0 : sata_fsl&lt;/P&gt;&lt;P&gt;ata1: SATA max UDMA/133 irq 68&lt;/P&gt;&lt;P&gt;fsl-sata ffe221000.sata: Sata FSL Platform/CSB Driver init&lt;/P&gt;&lt;P&gt;scsi1 : sata_fsl&lt;/P&gt;&lt;P&gt;ata2: SATA max UDMA/133 irq 69&lt;/P&gt;&lt;P&gt;of-flash fe8000000.nor: do_map_probe() failed&lt;/P&gt;&lt;P&gt;ONFI param page 0 valid&lt;/P&gt;&lt;P&gt;ONFI flash detected&lt;/P&gt;&lt;P&gt;NAND device: Manufacturer ID: 0x2c, Chip ID: 0xac (Micron MT29F4G08ABBDAH4), 512MiB, page size: 2048, OOB size: 64&lt;/P&gt;&lt;P&gt;Bad block table found at page 262080, version 0x01&lt;/P&gt;&lt;P&gt;Bad block table found at page 262016, version 0x01&lt;/P&gt;&lt;P&gt;fsl,ifc-nand fff800000.nand: IFC NAND device at 0xfff800000, bank 0&lt;/P&gt;&lt;P&gt;fsl_espi ffe110000.spi: master is unqueued, this is deprecated&lt;/P&gt;&lt;P&gt;m25p80 spi32766.0: unrecognized JEDEC id ffffff&lt;/P&gt;&lt;P&gt;fsl_espi ffe110000.spi: at 0x80000800801b6000 (irq = 53)&lt;/P&gt;&lt;P&gt;libphy: Fixed MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;mdio_bus ffe4fc000: cannot get PHY at address 2&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;mdio_bus ffe4fd000: cannot get PHY at address 12&lt;/P&gt;&lt;P&gt;mdio_bus ffe4fd000: cannot get PHY at address 13&lt;/P&gt;&lt;P&gt;mdio_bus ffe4fd000: cannot get PHY at address 0&lt;/P&gt;&lt;P&gt;mdio_bus ffe4fd000: cannot get PHY at address 1&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;libphy: Freescale XGMAC MDIO Bus: probed&lt;/P&gt;&lt;P&gt;cpu0/0: &amp;gt; WARNING (FM) [CPU00, drivers/net/ethernet/freescale/fman/Peripherals/FM/fm.c:3536 FM_Init]: &lt;/P&gt;&lt;P&gt;cpu0/0: Hack: No FM reset!&lt;/P&gt;&lt;P&gt;cpu0/0: &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Freescale FM module (Jun 14 2015:06:35:30), FMD API version 21.1.0&lt;/P&gt;&lt;P&gt;Freescale FM Ports module (Jun 14 2015:06:35:31)&lt;/P&gt;&lt;P&gt;fsl_mac: fsl_mac: FSL FMan MAC API based driver ()&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e0000.ethernet: FMan MEMAC&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e0000.ethernet: FMan MAC address: 00:04:9f:03:a1:a5&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e4000.ethernet: FMan MEMAC&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e4000.ethernet: FMan MAC address: 00:04:9f:03:a3:a7&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e6000.ethernet: FMan MEMAC&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e6000.ethernet: FMan MAC address: 00:04:9f:03:a3:a8&lt;/P&gt;&lt;P&gt;fsl_mac ffe4e8000.ethernet: No PHY (or fixed link) found&lt;/P&gt;&lt;P&gt;fsl_mac: probe of ffe4e8000.ethernet failed with error -22&lt;/P&gt;&lt;P&gt;fsl_mac ffe4ea000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@ea000) failed&lt;/P&gt;&lt;P&gt;fsl_mac: probe of ffe4ea000.ethernet failed with error -22&lt;/P&gt;&lt;P&gt;fsl_dpa: FSL DPAA Ethernet driver ()&lt;/P&gt;&lt;P&gt;fsl_dpa: FSL DPAA Ethernet debugfs entries ()&lt;/P&gt;&lt;P&gt;fsl_dpa: fsl_dpa: Probed interface eth0&lt;/P&gt;&lt;P&gt;fsl_dpa: fsl_dpa: Probed interface eth1&lt;/P&gt;&lt;P&gt;fsl_dpa ethernet.18: dev_get_drvdata(ffe4e8000.ethernet) failed&lt;/P&gt;&lt;P&gt;fsl_dpa: probe of ethernet.18 failed with error -22&lt;/P&gt;&lt;P&gt;fsl_dpa ethernet.19: dev_get_drvdata(ffe4ea000.ethernet) failed&lt;/P&gt;&lt;P&gt;fsl_dpa: probe of ethernet.19 failed with error -22&lt;/P&gt;&lt;P&gt;fsl_advanced: FSL DPAA Advanced drivers: ()&lt;/P&gt;&lt;P&gt;fsl_proxy: FSL DPAA Proxy initialization driver ()&lt;/P&gt;&lt;P&gt;fsl_dpa_shared: FSL DPAA Shared Ethernet driver ()&lt;/P&gt;&lt;P&gt;fsl_dpa_macless: FSL DPAA MACless Ethernet driver ()&lt;/P&gt;&lt;P&gt;fsl_oh: FSL FMan Offline Parsing port driver ()&lt;/P&gt;&lt;P&gt;e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k&lt;/P&gt;&lt;P&gt;e1000e: Copyright(c) 1999 - 2013 Intel Corporation.&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-0 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-1 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-2 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-3 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-4 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-5 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-6 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe100300.dma: dma channel dma-uio0-7 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-0 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-1 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-2 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-3 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-4 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-5 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-6 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe101300.dma: dma channel dma-uio1-7 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-0 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-1 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-2 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-3 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-4 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-5 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-6 initialized&lt;/P&gt;&lt;P&gt;fsl-of-dma ffe102300.dma: dma channel dma-uio2-7 initialized&lt;/P&gt;&lt;P&gt;ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver&lt;/P&gt;&lt;P&gt;ehci-pci: EHCI PCI platform driver&lt;/P&gt;&lt;P&gt;/************************************************&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; HANGS HERE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ***********************************************************************/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a yocto build setup to build the kernel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Flaby&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jun 2016 05:34:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504847#M877</guid>
      <dc:creator>flabyjacob</dc:creator>
      <dc:date>2016-06-20T05:34:15Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504848#M878</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am able to boot linux SMP on my custom board.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The below command on linux shows that only two cpus are enabled.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Can you please help me to understand why are the rest of cpus not listed if SMP is enabled?&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/**************************************************************************************************/&lt;/P&gt;&lt;P&gt;root@t2080rdb:~# cat /proc/cpuinfo&lt;/P&gt;&lt;P&gt;processor&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 0&lt;/P&gt;&lt;P&gt;cpu&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : e6500, altivec supported&lt;/P&gt;&lt;P&gt;clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 999.900000MHz&lt;/P&gt;&lt;P&gt;revision&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 2.0 (pvr 8040 0120)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;processor&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 1&lt;/P&gt;&lt;P&gt;cpu&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : e6500, altivec supported&lt;/P&gt;&lt;P&gt;clock&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 999.900000MHz&lt;/P&gt;&lt;P&gt;revision&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 2.0 (pvr 8040 0120)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;timebase&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : 29163750&lt;/P&gt;&lt;P&gt;platform&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : CoreNet Generic&lt;/P&gt;&lt;P&gt;model&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; : fsl,T2080RDB&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/**************************************************************************************************/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;The bootlog as below shows, &lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;Brought up 2 CPUs&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/**************************************************************************************************/&lt;/P&gt;&lt;P&gt;Linux version 3.12.37-rt51-QorIQ-SDK-V1.8+gf488de6 (samad@ubuntunzn) (gcc version 4.9.2 (GCC) ) #3 SMP Mon Jun 20 14:43:39 IST 2016&lt;/P&gt;&lt;P&gt;CF000012&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Setup Arch&lt;/P&gt;&lt;P&gt;[boot]0012 Setup Arch&lt;/P&gt;&lt;P&gt;CoreNet Generic board from Freescale Semiconductor&lt;/P&gt;&lt;P&gt;Zone ranges:&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; [mem 0x00000000-0x7fffffff]&lt;/P&gt;&lt;P&gt;&amp;nbsp; Normal&amp;nbsp;&amp;nbsp; empty&lt;/P&gt;&lt;P&gt;Movable zone start for each node&lt;/P&gt;&lt;P&gt;Early memory node ranges&lt;/P&gt;&lt;P&gt;&amp;nbsp; node&amp;nbsp;&amp;nbsp; 0: [mem 0x00000000-0x7fffffff]&lt;/P&gt;&lt;P&gt;MMU: Allocated 2112 bytes of context maps for 255 contexts&lt;/P&gt;&lt;P&gt;CF000015&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Setup Done&lt;/P&gt;&lt;P&gt;[boot]0015 Setup Done&lt;/P&gt;&lt;P&gt;PERCPU: Embedded 11 pages/cpu @c000000002800000 s15104 r0 d29952 u131072&lt;/P&gt;&lt;P&gt;Built 1 zonelists in Zone order, mobility grouping on.&amp;nbsp; Total pages: 517120&lt;/P&gt;&lt;P&gt;Kernel command line: root=/dev/ram rw console=ttyS0,115200 init=/sbin/init&lt;/P&gt;&lt;P&gt;PID hash table entries: 4096 (order: 3, 32768 bytes)&lt;/P&gt;&lt;P&gt;Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)&lt;/P&gt;&lt;P&gt;Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)&lt;/P&gt;&lt;P&gt;Sorting __ex_table...&lt;/P&gt;&lt;P&gt;Memory: 1903612K/2097152K available (6892K kernel code, 1004K rwdata, 2472K rodata, 308K init, 757K bss, 193540K reserved)&lt;/P&gt;&lt;P&gt;Hierarchical RCU implementation.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; RCU debugfs-based tracing is enabled.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CONFIG_RCU_FANOUT set to non-default value of 32&lt;/P&gt;&lt;P&gt;NR_IRQS:512 nr_irqs:512 16&lt;/P&gt;&lt;P&gt;mpic: Setting up MPIC " OpenPIC&amp;nbsp; " version 1.2 at ffe040000, max 8 CPUs&lt;/P&gt;&lt;P&gt;mpic: ISU size: 512, shift: 9, mask: 1ff&lt;/P&gt;&lt;P&gt;mpic: Initializing for 512 sources&lt;/P&gt;&lt;P&gt;clocksource: timebase mult[112502a5] shift[23] registered&lt;/P&gt;&lt;P&gt;Console: colour dummy device 80x25&lt;/P&gt;&lt;P&gt;pid_max: default: 32768 minimum: 301&lt;/P&gt;&lt;P&gt;Mount-cache hash table entries: 256&lt;/P&gt;&lt;P&gt;mpic: requesting IPIs...&lt;/P&gt;&lt;P&gt;e6500 family performance monitor hardware support registered&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;Brought up 2 CPUs&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;devtmpfs: initialized&lt;/P&gt;&lt;P&gt;xor: measuring software checksum speed&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 8regs&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; :&amp;nbsp; 2022.000 MB/sec&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 8regs_prefetch:&amp;nbsp; 1782.000 MB/sec&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 32regs&amp;nbsp;&amp;nbsp;&amp;nbsp; :&amp;nbsp; 1699.000 MB/sec&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; 32regs_prefetch:&amp;nbsp; 1497.000 MB/sec&lt;/P&gt;&lt;P&gt;xor: using function: 8regs (2022.000 MB/sec)&lt;/P&gt;&lt;P&gt;/**************************************************************************************************/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Can you please help me to solve this issue?&lt;/LI&gt;&lt;LI&gt;The problem of enabling only two cpus is common when board is booted with linux or vxWorks from UBoot.&lt;/LI&gt;&lt;LI&gt;That means, is&amp;nbsp; problem with the UBoot?&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Flaby&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jun 2016 10:19:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504848#M878</guid>
      <dc:creator>flabyjacob</dc:creator>
      <dc:date>2016-06-20T10:19:33Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB: vxWorks SMP boot problem from UBoot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504849#M879</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Flaby,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am also facing the same problem on T2080 custom board, kernel hangs at the same point.&lt;/P&gt;&lt;P&gt;Can i know&amp;nbsp;how you solved it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Pushpa&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Feb 2018 05:05:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-vxWorks-SMP-boot-problem-from-UBoot/m-p/504849#M879</guid>
      <dc:creator>pushpamanjunath</dc:creator>
      <dc:date>2018-02-02T05:05:36Z</dc:date>
    </item>
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