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    <title>topic Re: Invalid PCIe Header while Loading AMDGPU on T1040RDB in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2364096#M5403</link>
    <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Please provide&amp;nbsp;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;lspci -vvv -s 01:00.0&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Output&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Your currecnt DTS&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;SPAN&gt;Input "&lt;/SPAN&gt;&lt;SPAN&gt;reginfo&lt;/SPAN&gt;&lt;SPAN&gt;" in the U-boot.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Tue, 12 May 2026 10:56:16 GMT</pubDate>
    <dc:creator>June_Lu</dc:creator>
    <dc:date>2026-05-12T10:56:16Z</dc:date>
    <item>
      <title>Invalid PCIe Header while Loading AMDGPU on T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2362759#M5396</link>
      <description>&lt;P&gt;Hi&lt;BR /&gt;&lt;BR /&gt;I am using T1040RDB board with E9171 AMDGPU connected via pcie, while loading this driver i am getting following error&lt;BR /&gt;&lt;BR /&gt;root@t1042d4rdb:~# insmod /amdgpu.ko&lt;BR /&gt;[drm] amdgpu kernel modesetting enabled.&lt;BR /&gt;[drm] initializing kernel modesetting (POLARIS12 0x1002:0x6987 0x1787:0x2389 0x80).&lt;BR /&gt;amdgpu 0001:01:00.0: amdgpu: Trusted Memory Zone (TMZ) feature not supported&lt;BR /&gt;[drm] register mmio base: 0x80000000&lt;BR /&gt;[drm] register mmio size: 262144&lt;BR /&gt;[drm] PCIE atomic ops is not supported&lt;BR /&gt;[drm] add ip block number 0 &amp;lt;vi_common&amp;gt;&lt;BR /&gt;[drm] add ip block number 1 &amp;lt;gmc_v8_0&amp;gt;&lt;BR /&gt;[drm] add ip block number 2 &amp;lt;tonga_ih&amp;gt;&lt;BR /&gt;[drm] add ip block number 3 &amp;lt;gfx_v8_0&amp;gt;&lt;BR /&gt;[drm] add ip block number 4 &amp;lt;sdma_v3_0&amp;gt;&lt;BR /&gt;[drm] add ip block number 5 &amp;lt;powerplay&amp;gt;&lt;BR /&gt;[drm] add ip block number 6 &amp;lt;dm&amp;gt;&lt;BR /&gt;[drm] add ip block number 7 &amp;lt;uvd_v6_0&amp;gt;&lt;BR /&gt;[drm] add ip block number 8 &amp;lt;vce_v3_0&amp;gt;&lt;BR /&gt;amdgpu 0001:01:00.0: Invalid PCI ROM header signature: expecting 0xaa55, got 0xadde&lt;BR /&gt;amdgpu 0001:01:00.0: Invalid PCI ROM header signature: expecting 0xaa55, got 0xadde&lt;BR /&gt;amdgpu 0001:01:00.0: amdgpu: Unable to locate a BIOS ROM&lt;BR /&gt;amdgpu 0001:01:00.0: amdgpu: Fatal error during GPU init&lt;BR /&gt;amdgpu 0001:01:00.0: amdgpu: amdgpu: finishing device.&lt;BR /&gt;Attempt to iounmap early bolted mapping at 0x0000000000000000&lt;BR /&gt;amdgpu: probe of 0001:01:00.0 failed with error -22&lt;BR /&gt;&lt;BR /&gt;PCIE log&lt;/P&gt;&lt;P&gt;root@t1042d4rdb:~# lspci -vvv&lt;BR /&gt;0001:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0820 (rev 10) (prog-if 00 [Normal decode])&lt;BR /&gt;Device tree node: /sys/firmware/devicetree/base/pcie@ffe250000/pcie@0&lt;BR /&gt;Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-&lt;BR /&gt;Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast &amp;gt;TAbort- &amp;lt;TAbort- &amp;lt;MAbort- &amp;gt;SERR- &amp;lt;PERR- INTx-&lt;BR /&gt;Latency: 0, Cache Line Size: 32 bytes&lt;BR /&gt;Interrupt: pin ? routed to IRQ 21&lt;BR /&gt;IOMMU group: 21&lt;BR /&gt;Region 0: Memory at &amp;lt;ignored&amp;gt; (32-bit, non-prefetchable)&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=01, sec-latency=0&lt;BR /&gt;I/O behind bridge: 00000000-0000ffff [size=64K]&lt;BR /&gt;Memory behind bridge: 80000000-9fffffff [size=512M]&lt;BR /&gt;Prefetchable memory behind bridge: 0000000c10000000-0000000c4fffffff [size=1G]&lt;BR /&gt;Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast &amp;gt;TAbort- &amp;lt;TAbort- &amp;lt;MAbort+ &amp;lt;SERR- &amp;lt;PERR-&lt;BR /&gt;BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- &amp;gt;Reset- FastB2B-&lt;BR /&gt;PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-&lt;BR /&gt;Capabilities: [44] Power Management version 3&lt;BR /&gt;Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)&lt;BR /&gt;Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-&lt;BR /&gt;Capabilities: [4c] Express (v2) Root Port (Slot-), MSI 00&lt;BR /&gt;DevCap: MaxPayload 256 bytes, PhantFunc 0&lt;BR /&gt;ExtTag- RBE+&lt;BR /&gt;DevCtl: CorrErr- NonFatalErr+ FatalErr+ UnsupReq+&lt;BR /&gt;RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+&lt;BR /&gt;MaxPayload 128 bytes, MaxReadReq 512 bytes&lt;BR /&gt;DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-&lt;BR /&gt;LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L0s, Exit Latency L0s &amp;lt;2us&lt;BR /&gt;ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp-&lt;BR /&gt;LnkCtl: ASPM Disabled; RCB 128 bytes, Disabled- CommClk-&lt;BR /&gt;ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-&lt;BR /&gt;LnkSta: Speed 5GT/s (ok), Width x1 (downgraded)&lt;BR /&gt;TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt+&lt;BR /&gt;RootCap: CRSVisible-&lt;BR /&gt;RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-&lt;BR /&gt;RootSta: PME ReqID 0000, PMEStatus- PMEPending-&lt;BR /&gt;DevCap2: Completion Timeout: Range ABC, TimeoutDis+ NROPrPrP- LTR-&lt;BR /&gt;10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-&lt;BR /&gt;EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-&lt;BR /&gt;FRS- LN System CLS Not Supported, TPHComp- ExtTPHComp- ARIFwd-&lt;BR /&gt;AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-&lt;BR /&gt;DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled, ARIFwd-&lt;BR /&gt;AtomicOpsCtl: ReqEn- EgressBlck-&lt;BR /&gt;LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-&lt;BR /&gt;Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-&lt;BR /&gt;Compliance De-emphasis: -6dB&lt;BR /&gt;LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-&lt;BR /&gt;EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-&lt;BR /&gt;Retimer- 2Retimers- CrosslinkRes: unsupported&lt;BR /&gt;Capabilities: [100 v1] Advanced Error Reporting&lt;BR /&gt;UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-&lt;BR /&gt;CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-&lt;BR /&gt;CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-&lt;BR /&gt;MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-&lt;BR /&gt;HeaderLog: 00000000 00000000 00000000 00000000&lt;BR /&gt;RootCmd: CERptEn- NFERptEn- FERptEn-&lt;BR /&gt;RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-&lt;BR /&gt;FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0&lt;BR /&gt;ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;0001:01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Lexa [Radeon 540X/550X/630 / RX 640 / E9171 MCM] (rev 80) (prog-if 00 [VGA controller])&lt;BR /&gt;Subsystem: Hightech Information System Ltd. Device 2389&lt;BR /&gt;Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-&lt;BR /&gt;Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast &amp;gt;TAbort- &amp;lt;TAbort- &amp;lt;MAbort- &amp;gt;SERR- &amp;lt;PERR- INTx-&lt;BR /&gt;Latency: 0, Cache Line Size: 32 bytes&lt;BR /&gt;Interrupt: pin A routed to IRQ 41&lt;BR /&gt;IOMMU group: 21&lt;BR /&gt;Region 0: Memory at c10000000 (64-bit, prefetchable) [size=256M]&lt;BR /&gt;Region 2: Memory at c20000000 (64-bit, prefetchable) [size=2M]&lt;BR /&gt;Region 4: I/O ports at 1100 [size=256]&lt;BR /&gt;Region 5: Memory at 80000000 (32-bit, non-prefetchable) [size=256K]&lt;BR /&gt;Expansion ROM at 80040000 [disabled] [size=128K]&lt;BR /&gt;Capabilities: [48] Vendor Specific Information: Len=08 &amp;lt;?&amp;gt;&lt;BR /&gt;Capabilities: [50] Power Management version 3&lt;BR /&gt;Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1+,D2+,D3hot+,D3cold+)&lt;BR /&gt;Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-&lt;BR /&gt;Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00&lt;BR /&gt;DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s &amp;lt;4us, L1 unlimited&lt;BR /&gt;ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-&lt;BR /&gt;DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-&lt;BR /&gt;RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+&lt;BR /&gt;MaxPayload 128 bytes, MaxReadReq 512 bytes&lt;BR /&gt;DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq+ AuxPwr- TransPend-&lt;BR /&gt;LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM L1, Exit Latency L1 &amp;lt;1us&lt;BR /&gt;ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+&lt;BR /&gt;LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-&lt;BR /&gt;ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-&lt;BR /&gt;LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)&lt;BR /&gt;TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-&lt;BR /&gt;DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR+&lt;BR /&gt;10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 1&lt;BR /&gt;EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-&lt;BR /&gt;FRS-&lt;BR /&gt;AtomicOpsCap: 32bit+ 64bit+ 128bitCAS-&lt;BR /&gt;DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,&lt;BR /&gt;AtomicOpsCtl: ReqEn-&lt;BR /&gt;LnkCap2: Supported Link Speeds: 2.5-8GT/s, Crosslink- Retimer- 2Retimers- DRS-&lt;BR /&gt;LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-&lt;BR /&gt;Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-&lt;BR /&gt;Compliance De-emphasis: -6dB&lt;BR /&gt;LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-&lt;BR /&gt;EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-&lt;BR /&gt;Retimer- 2Retimers- CrosslinkRes: unsupported&lt;BR /&gt;Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+&lt;BR /&gt;Address: 0000000000000000 Data: 0000&lt;BR /&gt;Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 &amp;lt;?&amp;gt;&lt;BR /&gt;Capabilities: [150 v2] Advanced Error Reporting&lt;BR /&gt;UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-&lt;BR /&gt;CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-&lt;BR /&gt;MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-&lt;BR /&gt;HeaderLog: 00000000 00000000 00000000 00000000&lt;BR /&gt;Capabilities: [200 v1] Physical Resizable BAR&lt;BR /&gt;BAR 0: current size: 256MB, supported: 256MB 512MB 1GB 2GB 4GB&lt;BR /&gt;Capabilities: [270 v1] Secondary PCI Express&lt;BR /&gt;LnkCtl3: LnkEquIntrruptEn- PerformEqu-&lt;BR /&gt;LaneErrStat: 0&lt;BR /&gt;Capabilities: [2b0 v1] Address Translation Service (ATS)&lt;BR /&gt;ATSCap: Invalidate Queue Depth: 00&lt;BR /&gt;ATSCtl: Enable-, Smallest Translation Unit: 00&lt;BR /&gt;Capabilities: [2c0 v1] Page Request Interface (PRI)&lt;BR /&gt;PRICtl: Enable- Reset-&lt;BR /&gt;PRISta: RF- UPRGI- Stopped+&lt;BR /&gt;Page Request Capacity: 00000020, Page Request Allocation: 00000000&lt;BR /&gt;Capabilities: [2d0 v1] Process Address Space ID (PASID)&lt;BR /&gt;PASIDCap: Exec+ Priv+, Max PASID Width: 10&lt;BR /&gt;PASIDCtl: Enable- Exec- Priv-&lt;BR /&gt;Capabilities: [320 v1] Latency Tolerance Reporting&lt;BR /&gt;Max snoop latency: 0ns&lt;BR /&gt;Max no snoop latency: 0ns&lt;BR /&gt;Capabilities: [328 v1] Alternative Routing-ID Interpretation (ARI)&lt;BR /&gt;ARICap: MFVC- ACS-, Next Function: 1&lt;BR /&gt;ARICtl: MFVC- ACS-, Function Group: 0&lt;BR /&gt;Capabilities: [370 v1] L1 PM Substates&lt;BR /&gt;L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+&lt;BR /&gt;PortCommonModeRestoreTime=0us PortTPowerOnTime=170us&lt;BR /&gt;L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-&lt;BR /&gt;T_CommonMode=0us LTR1.2_Threshold=0ns&lt;BR /&gt;L1SubCtl2: T_PwrOn=10us&lt;BR /&gt;Kernel modules: amdgpu&lt;/P&gt;&lt;P&gt;0001:01:00.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Baffin HDMI/DP Audio [Radeon RX 550 640SP / RX 560/560X]&lt;BR /&gt;Subsystem: Hightech Information System Ltd. Device aae0&lt;BR /&gt;Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-&lt;BR /&gt;Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast &amp;gt;TAbort- &amp;lt;TAbort- &amp;lt;MAbort- &amp;gt;SERR- &amp;lt;PERR- INTx-&lt;BR /&gt;Latency: 0, Cache Line Size: 32 bytes&lt;BR /&gt;Interrupt: pin B routed to IRQ 17&lt;BR /&gt;IOMMU group: 21&lt;BR /&gt;Region 0: Memory at 80060000 (64-bit, non-prefetchable) [size=16K]&lt;BR /&gt;Capabilities: [48] Vendor Specific Information: Len=08 &amp;lt;?&amp;gt;&lt;BR /&gt;Capabilities: [50] Power Management version 3&lt;BR /&gt;Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)&lt;BR /&gt;Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-&lt;BR /&gt;Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00&lt;BR /&gt;DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s &amp;lt;4us, L1 unlimited&lt;BR /&gt;ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-&lt;BR /&gt;DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-&lt;BR /&gt;RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+&lt;BR /&gt;MaxPayload 128 bytes, MaxReadReq 512 bytes&lt;BR /&gt;DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq+ AuxPwr- TransPend-&lt;BR /&gt;LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM L1, Exit Latency L1 &amp;lt;1us&lt;BR /&gt;ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+&lt;BR /&gt;LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-&lt;BR /&gt;ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-&lt;BR /&gt;LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)&lt;BR /&gt;TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-&lt;BR /&gt;DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR+&lt;BR /&gt;10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 1&lt;BR /&gt;EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-&lt;BR /&gt;FRS-&lt;BR /&gt;AtomicOpsCap: 32bit+ 64bit+ 128bitCAS-&lt;BR /&gt;DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,&lt;BR /&gt;AtomicOpsCtl: ReqEn-&lt;BR /&gt;LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-&lt;BR /&gt;EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-&lt;BR /&gt;Retimer- 2Retimers- CrosslinkRes: unsupported&lt;BR /&gt;Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+&lt;BR /&gt;Address: 0000000000000000 Data: 0000&lt;BR /&gt;Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 &amp;lt;?&amp;gt;&lt;BR /&gt;Capabilities: [150 v2] Advanced Error Reporting&lt;BR /&gt;UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-&lt;BR /&gt;CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-&lt;BR /&gt;MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-&lt;BR /&gt;HeaderLog: 00000000 00000000 00000000 00000000&lt;BR /&gt;Capabilities: [328 v1] Alternative Routing-ID Interpretation (ARI)&lt;BR /&gt;ARICap: MFVC- ACS-, Next Function: 0&lt;BR /&gt;ARICtl: MFVC- ACS-, Function Group: 0&lt;BR /&gt;&lt;BR /&gt;dmesg log:&lt;/P&gt;&lt;P&gt;U-Boot 2021.04+fsl+gf7b43f8b4c1 (Mar 01 2022 - 07:31:56 +0000)&lt;/P&gt;&lt;P&gt;CPU0: T1040E, Version: 1.0, (0x85280010)&lt;BR /&gt;Core: e5500, Version: 2.0, (0x80241020)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt;CPU0:1400 MHz, CPU1:1400 MHz, CPU2:1400 MHz, CPU3:1400 MHz,&lt;BR /&gt;CCB:600 MHz,&lt;BR /&gt;DDR:800 MHz (1600 MT/s data rate) (Asynchronous), IFC:300 MHz&lt;BR /&gt;QE:300 MHz&lt;BR /&gt;FMAN1: 600 MHz&lt;BR /&gt;QMAN: 300 MHz&lt;BR /&gt;PME: 300 MHz&lt;BR /&gt;L1: D-cache 32 KiB enabled&lt;BR /&gt;I-cache 32 KiB enabled&lt;BR /&gt;Reset Configuration Word (RCW):&lt;BR /&gt;00000000: 0c18000e 0e000000 00000000 00000000&lt;BR /&gt;00000010: 66000002 80000002 68106000 01000000&lt;BR /&gt;00000020: 00000000 00000000 00000000 00032810&lt;BR /&gt;00000030: 00000000 0342500f 00000000 00000000&lt;BR /&gt;Board: T1040RDB&lt;BR /&gt;Board rev: 0x01 CPLD ver: 0x06, vBank: 0&lt;BR /&gt;I2C: ready&lt;BR /&gt;DRAM: Detected UDIMM 18KSF51272AZ-1G6K1&lt;BR /&gt;2 GiB left unmapped&lt;BR /&gt;2 GiB (DDR3, 64-bit, CL=11, ECC on)&lt;BR /&gt;Flash: 256 MiB&lt;BR /&gt;L2: 256 KiB enabled&lt;BR /&gt;Corenet Platform Cache: 256 KiB enabled&lt;BR /&gt;Using SERDES1 Protocol: 102 (0x66)&lt;BR /&gt;WARN: pls set popts-&amp;gt;cpo_sample = 0x54 in &amp;lt;board&amp;gt;/ddr.c to optimize cpo&lt;BR /&gt;SEC0: RNG instantiated&lt;BR /&gt;MMC: No max bus width provided. Assume 8-bit supported.&lt;BR /&gt;FSL_SDHC: 0&lt;BR /&gt;Loading Environment from MMC... *** Warning - bad CRC, using default environment&lt;/P&gt;&lt;P&gt;PCIe1: Root Complex, no link, regs @ 0xfe240000&lt;BR /&gt;PCIe1: Bus 00 - 00&lt;BR /&gt;PCIe2: Root Complex, x1 gen2, regs @ 0xfe250000&lt;BR /&gt;02:00.0 - 1002:6987 - Display controller&lt;BR /&gt;02:00.1 - 1002:aae0 - Multimedia device&lt;BR /&gt;PCIe2: Bus 01 - 02&lt;BR /&gt;PCIe3: Root Complex, no link, regs @ 0xfe260000&lt;BR /&gt;PCIe3: Bus 03 - 03&lt;BR /&gt;PCIe4: Root Complex, no link, regs @ 0xfe270000&lt;BR /&gt;PCIe4: Bus 04 - 04&lt;BR /&gt;In: serial&lt;BR /&gt;Out: serial&lt;BR /&gt;Err: serial&lt;BR /&gt;SERDES Reference : 0x66&lt;BR /&gt;Net: Initializing Fman&lt;/P&gt;&lt;P&gt;MMC read: dev # 0, block # 2080, count 128 ...&lt;BR /&gt;Fman1: Data at 7fb20508 is not a firmware&lt;BR /&gt;VSC9953 L2 switch initialized&lt;BR /&gt;No ethernet found.&lt;BR /&gt;Hit any key to stop autoboot: 0&lt;BR /&gt;=&amp;gt; mmc dev 0&lt;BR /&gt;switch to partitions #0, OK&lt;BR /&gt;mmc0 is current device&lt;BR /&gt;=&amp;gt; setenv bootargs root=/dev/mmcblk0p2 rw rootwait console=ttyS0,115200&lt;BR /&gt;=&amp;gt; fatload mmc 0:1 0x1000000 uImage&lt;BR /&gt;WARNING: adjusting available memory to 30000000&lt;BR /&gt;8485109 bytes read in 389 ms (20.8 MiB/s)&lt;BR /&gt;=&amp;gt; fatload mmc 0:1 0x2000000 t1040rdb.dtb&lt;BR /&gt;WARNING: adjusting available memory to 30000000&lt;BR /&gt;30773 bytes read in 29 ms (1 MiB/s)&lt;BR /&gt;=&amp;gt; bootm 0x1000000 - 0x2000000&lt;BR /&gt;WARNING: adjusting available memory to 30000000&lt;BR /&gt;## Booting kernel from Legacy Image at 01000000 ...&lt;BR /&gt;Image Name: Linux-5.15.71+g95448dd0dc9b&lt;BR /&gt;Image Type: PowerPC Linux Kernel Image (gzip compressed)&lt;BR /&gt;Data Size: 8485045 Bytes = 8.1 MiB&lt;BR /&gt;Load Address: 00000000&lt;BR /&gt;Entry Point: 00000000&lt;BR /&gt;Verifying Checksum ... OK&lt;BR /&gt;## Flattened Device Tree blob at 02000000&lt;BR /&gt;Booting using the fdt blob at 0x2000000&lt;BR /&gt;Uncompressing Kernel Image&lt;BR /&gt;Loading Device Tree to 03fe5000, end 03fff834 ... OK&lt;BR /&gt;OF: reserved mem: initialized node qman-fqd, compatible id fsl,qman-fqd&lt;BR /&gt;OF: reserved mem: initialized node qman-pfdr, compatible id fsl,qman-pfdr&lt;BR /&gt;OF: reserved mem: initialized node bman-fbpr, compatible id fsl,bman-fbpr&lt;BR /&gt;MMU: Supported page sizes&lt;BR /&gt;4 KB as direct&lt;BR /&gt;4096 KB as direct&lt;BR /&gt;16384 KB as direct&lt;BR /&gt;65536 KB as direct&lt;BR /&gt;262144 KB as direct&lt;BR /&gt;1048576 KB as direct&lt;BR /&gt;MMU: Book3E HW tablewalk not supported&lt;BR /&gt;Linux version 5.15.71+g95448dd0dc9b (oe-user@oe-host) (powerpc64-fsl-linux-gcc (GCC) 11.2.0, GNU ld (GNU Binutils) 2.37.20210721) #1 SMP Wed Feb 8 03:38:28 UTC 2023&lt;BR /&gt;Using CoreNet Generic machine description&lt;BR /&gt;printk: bootconsole [udbg0] enabled&lt;BR /&gt;CPU maps initialized for 1 thread per core&lt;BR /&gt;-----------------------------------------------------&lt;BR /&gt;phys_mem_size = 0x80000000&lt;BR /&gt;dcache_bsize = 0x40&lt;BR /&gt;icache_bsize = 0x40&lt;BR /&gt;cpu_features = 0x0000000300800394&lt;BR /&gt;possible = 0x0000000300900396&lt;BR /&gt;always = 0x0000000300800394&lt;BR /&gt;cpu_user_features = 0xcc008000 0x08000000&lt;BR /&gt;mmu_features = 0x000a0010&lt;BR /&gt;firmware_features = 0x0000000000000000&lt;BR /&gt;-----------------------------------------------------&lt;BR /&gt;ioremap() called early from .of_iomap+0x4c/0x84. Use early_ioremap() instead&lt;BR /&gt;CoreNet Generic board&lt;BR /&gt;barrier-nospec: using isync; sync as speculation barrier&lt;BR /&gt;Zone ranges:&lt;BR /&gt;DMA [mem 0x0000000000000000-0x000000007fffffff]&lt;BR /&gt;Normal empty&lt;BR /&gt;Movable zone start for each node&lt;BR /&gt;Early memory node ranges&lt;BR /&gt;node 0: [mem 0x0000000000000000-0x000000007fffffff]&lt;BR /&gt;Initmem setup node 0 [mem 0x0000000000000000-0x000000007fffffff]&lt;BR /&gt;MMU: Allocated 2112 bytes of context maps for 255 contexts&lt;BR /&gt;percpu: Embedded 24 pages/cpu s60888 r0 d37416 u262144&lt;BR /&gt;Built 1 zonelists, mobility grouping on. Total pages: 517120&lt;BR /&gt;Kernel command line: root=/dev/mmcblk0p2 rw rootwait console=ttyS0,115200&lt;BR /&gt;printk: log_buf_len individual max cpu contribution: 4096 bytes&lt;BR /&gt;printk: log_buf_len total cpu_extra contributions: 12288 bytes&lt;BR /&gt;printk: log_buf_len min size: 16384 bytes&lt;BR /&gt;printk: log_buf_len: 32768 bytes&lt;BR /&gt;printk: early log buf free: 13112(80%)&lt;BR /&gt;Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)&lt;BR /&gt;Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)&lt;BR /&gt;mem auto-init: stack:off, heap alloc:off, heap free:off&lt;BR /&gt;Memory: 1923292K/2097152K available (13112K kernel code, 2400K rwdata, 4384K rodata, 452K init, 262K bss, 173860K reserved, 0K cma-reserved)&lt;BR /&gt;SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1&lt;BR /&gt;trace event string verifier disabled&lt;BR /&gt;rcu: Hierarchical RCU implementation.&lt;BR /&gt;rcu: RCU event tracing is enabled.&lt;BR /&gt;rcu: RCU restricting CPUs from NR_CPUS=24 to nr_cpu_ids=4.&lt;BR /&gt;rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.&lt;BR /&gt;rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4&lt;BR /&gt;NR_IRQS: 512, nr_irqs: 512, preallocated irqs: 16&lt;BR /&gt;mpic: Setting up MPIC " OpenPIC " version 1.2 at ffe040000, max 4 CPUs&lt;BR /&gt;mpic: ISU size: 512, shift: 9, mask: 1ff&lt;BR /&gt;mpic: Initializing for 512 sources&lt;BR /&gt;clocksource: timebase: mask: 0xffffffffffffffff max_cycles: 0x8a60dd6a9, max_idle_ns: 440795204056 ns&lt;BR /&gt;clocksource: timebase mult[1aaaaaab] shift[24] registered&lt;BR /&gt;Console: colour dummy device 80x25&lt;BR /&gt;pid_max: default: 32768 minimum: 301&lt;BR /&gt;Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)&lt;BR /&gt;Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)&lt;BR /&gt;e500 family performance monitor hardware support registered&lt;BR /&gt;rcu: Hierarchical SRCU implementation.&lt;BR /&gt;smp: Bringing up secondary CPUs ...&lt;BR /&gt;smp: Brought up 1 node, 4 CPUs&lt;BR /&gt;devtmpfs: initialized&lt;BR /&gt;clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns&lt;BR /&gt;futex hash table entries: 1024 (order: 4, 65536 bytes, linear)&lt;BR /&gt;NET: Registered PF_NETLINK/PF_ROUTE protocol family&lt;BR /&gt;audit: initializing netlink subsys (disabled)&lt;BR /&gt;audit: type=2000 audit(0.044:1): state=initialized audit_enabled=0 res=1&lt;BR /&gt;Machine: fsl,T1040RDB&lt;BR /&gt;SoC family: QorIQ T1040&lt;BR /&gt;SoC ID: svr:0x85280010, Revision: 1.0&lt;BR /&gt;Found FSL PCI host bridge at 0x0000000ffe250000. Firmware bus number: 0-&amp;gt;1&lt;BR /&gt;PCI host bridge /pcie@ffe250000 ranges:&lt;BR /&gt;MEM 0x0000000080000000..0x000000009fffffff -&amp;gt; 0x0000000080000000&lt;BR /&gt;MEM 0x0000000c10000000..0x0000000c4fffffff -&amp;gt; 0x0000000c10000000 Prefetch&lt;BR /&gt;IO 0x0000000ff8010000..0x0000000ff801ffff -&amp;gt; 0x0000000000000000&lt;BR /&gt;Ran out of outbound PCI ATMUs for IO resource&lt;BR /&gt;/pcie@ffe250000: PCICSRBAR @ 0x7f000000&lt;BR /&gt;setup_pci_atmu: end of DRAM 80000000&lt;BR /&gt;/pcie@ffe250000: Setup 64-bit PCI DMA window&lt;BR /&gt;/pcie@ffe250000: DMA window size is 0x7f000000&lt;BR /&gt;platform ff6000000.qman-portal: Adding to iommu group 0&lt;BR /&gt;platform ff6004000.qman-portal: Adding to iommu group 1&lt;BR /&gt;platform ff6008000.qman-portal: Adding to iommu group 2&lt;BR /&gt;platform ff600c000.qman-portal: Adding to iommu group 3&lt;BR /&gt;platform ff6010000.qman-portal: Adding to iommu group 4&lt;BR /&gt;platform ff6014000.qman-portal: Adding to iommu group 5&lt;BR /&gt;platform ff6018000.qman-portal: Adding to iommu group 6&lt;BR /&gt;platform ff601c000.qman-portal: Adding to iommu group 7&lt;BR /&gt;platform ff6020000.qman-portal: Adding to iommu group 8&lt;BR /&gt;platform ff6024000.qman-portal: Adding to iommu group 9&lt;BR /&gt;platform ffe100300.dma: Adding to iommu group 10&lt;BR /&gt;platform ffe101300.dma: Adding to iommu group 11&lt;BR /&gt;platform ffe114000.sdhc: Adding to iommu group 12&lt;BR /&gt;platform ffe210000.usb: Adding to iommu group 13&lt;BR /&gt;platform ffe211000.usb: Adding to iommu group 14&lt;BR /&gt;platform ffe220000.sata: Adding to iommu group 15&lt;BR /&gt;platform ffe221000.sata: Adding to iommu group 16&lt;BR /&gt;platform ffe318000.qman: Adding to iommu group 17&lt;BR /&gt;platform ffe31a000.bman: Adding to iommu group 18&lt;BR /&gt;fsl-pci ffe250000.pcie: Adding to iommu group 19&lt;BR /&gt;platform ffe140000.qe: Adding to iommu group 20&lt;BR /&gt;software IO TLB: mapped [mem 0x0000000003fee000-0x0000000007fee000] (64MB)&lt;BR /&gt;PCI: Probing PCI hardware&lt;BR /&gt;fsl-pci ffe250000.pcie: PCI host bridge to bus 0001:00&lt;BR /&gt;pci_bus 0001:00: root bus resource [io 0x8000080000010000-0x800008000001ffff] (bus address [0x0000-0xffff])&lt;BR /&gt;pci_bus 0001:00: root bus resource [mem 0x80000000-0x9fffffff]&lt;BR /&gt;pci_bus 0001:00: root bus resource [mem 0xc10000000-0xc4fffffff 64bit pref]&lt;BR /&gt;pci_bus 0001:00: root bus resource [bus 00-01]&lt;BR /&gt;pci_bus 0001:00: busn_res: [bus 00-01] end is updated to ff&lt;BR /&gt;pci 0001:00:00.0: [1957:0820] type 01 class 0x060400&lt;BR /&gt;pci 0001:00:00.0: reg 0x10: [mem 0x7f000000-0x7fffffff]&lt;BR /&gt;pci 0001:00:00.0: supports D1 D2&lt;BR /&gt;pci 0001:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold&lt;BR /&gt;fsl-pci ffe250000.pcie: Removing from iommu group 19&lt;BR /&gt;pci 0001:00:00.0: Adding to iommu group 21&lt;BR /&gt;pci 0001:01:00.0: [1002:6987] type 00 class 0x030000&lt;BR /&gt;pci 0001:01:00.0: reg 0x10: [mem 0xe0000000-0xefffffff 64bit pref]&lt;BR /&gt;pci 0001:01:00.0: reg 0x18: [mem 0x1000ffe00000-0x1000ffffffff 64bit pref]&lt;BR /&gt;pci 0001:01:00.0: reg 0x20: [io 0x8000080000011100-0x80000800000111ff]&lt;BR /&gt;pci 0001:01:00.0: reg 0x24: [mem 0xfffc0000-0xffffffff]&lt;BR /&gt;pci 0001:01:00.0: reg 0x30: [mem 0xfffe0000-0xffffffff pref]&lt;BR /&gt;pci 0001:01:00.0: enabling Extended Tags&lt;BR /&gt;pci 0001:01:00.0: supports D1 D2&lt;BR /&gt;pci 0001:01:00.0: PME# supported from D1 D2 D3hot D3cold&lt;BR /&gt;pci 0001:01:00.0: 4.000 Gb/s available PCIe bandwidth, limited by 5.0 GT/s PCIe x1 link at 0001:00:00.0 (capable of 63.008 Gb/s with 8.0 GT/s PCIe x8 link)&lt;BR /&gt;pci 0001:01:00.0: Adding to iommu group 21&lt;BR /&gt;pci 0001:01:00.1: [1002:aae0] type 00 class 0x040300&lt;BR /&gt;pci 0001:01:00.1: reg 0x10: [mem 0x1200ffffc000-0x1200ffffffff 64bit]&lt;BR /&gt;pci 0001:01:00.1: enabling Extended Tags&lt;BR /&gt;pci 0001:01:00.1: supports D1 D2&lt;BR /&gt;pci 0001:01:00.1: Adding to iommu group 21&lt;BR /&gt;pci 0001:00:00.0: PCI bridge to [bus 01-ff]&lt;BR /&gt;pci 0001:00:00.0: bridge window [io 0x8000080000011000-0x8000080000011fff]&lt;BR /&gt;pci 0001:00:00.0: bridge window [mem 0xe0000000-0xefffffff]&lt;BR /&gt;pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01&lt;BR /&gt;pci_bus 0001:00: busn_res: [bus 00-ff] end is updated to 01&lt;BR /&gt;PCI: Cannot allocate resource region 0 of device 0001:00:00.0, will remap&lt;BR /&gt;PCI: Cannot allocate resource region 0 of device 0001:01:00.0, will remap&lt;BR /&gt;PCI: Cannot allocate resource region 2 of device 0001:01:00.0, will remap&lt;BR /&gt;PCI: Cannot allocate resource region 5 of device 0001:01:00.0, will remap&lt;BR /&gt;PCI: Cannot allocate resource region 6 of device 0001:01:00.0, will remap&lt;BR /&gt;PCI: Cannot allocate resource region 0 of device 0001:01:00.1, will remap&lt;BR /&gt;pci 0001:00:00.0: BAR 0: no space for [mem size 0x01000000]&lt;BR /&gt;pci 0001:00:00.0: BAR 0: failed to assign [mem size 0x01000000]&lt;BR /&gt;pci 0001:01:00.0: BAR 0: assigned [mem 0xc10000000-0xc1fffffff 64bit pref]&lt;BR /&gt;pci 0001:01:00.0: BAR 2: assigned [mem 0xc20000000-0xc201fffff 64bit pref]&lt;BR /&gt;pci 0001:01:00.0: BAR 5: assigned [mem 0x80000000-0x8003ffff]&lt;BR /&gt;pci 0001:01:00.0: BAR 6: assigned [mem 0x80040000-0x8005ffff pref]&lt;BR /&gt;pci 0001:01:00.1: BAR 0: assigned [mem 0x80060000-0x80063fff 64bit]&lt;BR /&gt;pci 0001:00:00.0: PCI bridge to [bus 01]&lt;BR /&gt;pci 0001:00:00.0: bridge window [io 0x8000080000010000-0x800008000001ffff]&lt;BR /&gt;pci 0001:00:00.0: bridge window [mem 0x80000000-0x9fffffff]&lt;BR /&gt;pci 0001:00:00.0: bridge window [mem 0xc10000000-0xc4fffffff 64bit pref]&lt;BR /&gt;pci_bus 0001:00: Some PCI device resources are unassigned, try booting with pci=realloc&lt;BR /&gt;pci_bus 0001:00: resource 4 [io 0x8000080000010000-0x800008000001ffff]&lt;BR /&gt;pci_bus 0001:00: resource 5 [mem 0x80000000-0x9fffffff]&lt;BR /&gt;pci_bus 0001:00: resource 6 [mem 0xc10000000-0xc4fffffff 64bit pref]&lt;BR /&gt;pci_bus 0001:01: resource 0 [io 0x8000080000010000-0x800008000001ffff]&lt;BR /&gt;pci_bus 0001:01: resource 1 [mem 0x80000000-0x9fffffff]&lt;BR /&gt;pci_bus 0001:01: resource 2 [mem 0xc10000000-0xc4fffffff 64bit pref]&lt;BR /&gt;HugeTLB registered 4.00 MiB page size, pre-allocated 0 pages&lt;BR /&gt;HugeTLB registered 16.0 MiB page size, pre-allocated 0 pages&lt;BR /&gt;HugeTLB registered 64.0 MiB page size, pre-allocated 0 pages&lt;BR /&gt;HugeTLB registered 256 MiB page size, pre-allocated 0 pages&lt;BR /&gt;HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages&lt;BR /&gt;Freescale Elo series DMA driver&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #0 (fsl,eloplus-dma-channel), irq 28&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #1 (fsl,eloplus-dma-channel), irq 29&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #2 (fsl,eloplus-dma-channel), irq 30&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #3 (fsl,eloplus-dma-channel), irq 31&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #4 (fsl,eloplus-dma-channel), irq 76&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #5 (fsl,eloplus-dma-channel), irq 77&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #6 (fsl,eloplus-dma-channel), irq 78&lt;BR /&gt;fsl-elo-dma ffe100300.dma: #7 (fsl,eloplus-dma-channel), irq 79&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #0 (fsl,eloplus-dma-channel), irq 32&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #1 (fsl,eloplus-dma-channel), irq 33&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #2 (fsl,eloplus-dma-channel), irq 34&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #3 (fsl,eloplus-dma-channel), irq 35&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #4 (fsl,eloplus-dma-channel), irq 80&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #5 (fsl,eloplus-dma-channel), irq 81&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #6 (fsl,eloplus-dma-channel), irq 82&lt;BR /&gt;fsl-elo-dma ffe101300.dma: #7 (fsl,eloplus-dma-channel), irq 83&lt;BR /&gt;iommu: Default domain type: Translated&lt;BR /&gt;iommu: DMA domain TLB invalidation policy: strict mode&lt;BR /&gt;pci 0001:01:00.0: vgaarb: VGA device added: decodes=io+mem,owns=none,locks=none&lt;BR /&gt;pci 0001:01:00.0: vgaarb: bridge control possible&lt;BR /&gt;pci 0001:01:00.0: vgaarb: setting as boot device (VGA legacy resources not available)&lt;BR /&gt;vgaarb: loaded&lt;BR /&gt;SCSI subsystem initialized&lt;BR /&gt;usbcore: registered new interface driver usbfs&lt;BR /&gt;usbcore: registered new interface driver hub&lt;BR /&gt;usbcore: registered new device driver usb&lt;BR /&gt;pps_core: LinuxPPS API ver. 1 registered&lt;BR /&gt;pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti &amp;lt;giometti@linux.it&amp;gt;&lt;BR /&gt;PTP clock support registered&lt;BR /&gt;Advanced Linux Sound Architecture Driver Initialized.&lt;BR /&gt;clocksource: Switched to clocksource timebase&lt;BR /&gt;NET: Registered PF_INET protocol family&lt;BR /&gt;IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)&lt;BR /&gt;tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)&lt;BR /&gt;Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)&lt;BR /&gt;TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)&lt;BR /&gt;TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear)&lt;BR /&gt;TCP: Hash tables configured (established 16384 bind 16384)&lt;BR /&gt;UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)&lt;BR /&gt;UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)&lt;BR /&gt;NET: Registered PF_UNIX/PF_LOCAL protocol family&lt;BR /&gt;RPC: Registered named UNIX socket transport module.&lt;BR /&gt;RPC: Registered udp transport module.&lt;BR /&gt;RPC: Registered tcp transport module.&lt;BR /&gt;RPC: Registered tcp NFSv4.1 backchannel transport module.&lt;BR /&gt;pci 0001:01:00.1: D0 power state depends on 0001:01:00.0&lt;BR /&gt;PCI: CLS 32 bytes, default 64&lt;BR /&gt;workingset: timestamp_bits=62 max_order=19 bucket_order=0&lt;BR /&gt;NFS: Registering the id_resolver key type&lt;BR /&gt;Key type id_resolver registered&lt;BR /&gt;Key type id_legacy registered&lt;BR /&gt;Installing knfsd (copyright (C) 1996 okir@monad.swb.de).&lt;BR /&gt;ntfs: driver 2.1.32 [Flags: R/O].&lt;BR /&gt;jffs2: version 2.2. (NAND) �© 2001-2006 Red Hat, Inc.&lt;BR /&gt;io scheduler mq-deadline registered&lt;BR /&gt;io scheduler kyber registered&lt;BR /&gt;pcieport 0001:00:00.0: PME: Signaling with IRQ 21&lt;BR /&gt;bman_portal ff4000000.bman-portal: Portal initialised, cpu 0&lt;BR /&gt;bman_portal ff4004000.bman-portal: Portal initialised, cpu 1&lt;BR /&gt;bman_portal ff4008000.bman-portal: Portal initialised, cpu 2&lt;BR /&gt;bman_portal ff400c000.bman-portal: Portal initialised, cpu 3&lt;BR /&gt;qman_portal ff6000000.qman-portal: Portal initialised, cpu 0&lt;BR /&gt;qman_portal ff6004000.qman-portal: Portal initialised, cpu 1&lt;BR /&gt;qman_portal ff6008000.qman-portal: Portal initialised, cpu 2&lt;BR /&gt;qman_portal ff600c000.qman-portal: Portal initialised, cpu 3&lt;BR /&gt;Serial: 8250/16550 driver, 6 ports, IRQ sharing enabled&lt;BR /&gt;printk: console [ttyS0] disabled&lt;BR /&gt;serial8250.0: ttyS0 at MMIO 0xffe11c500 (irq = 36, base_baud = 18750000) is a 16550A_FSL64&lt;BR /&gt;printk: console [ttyS0] enabled&lt;BR /&gt;printk: console [ttyS0] enabled&lt;BR /&gt;printk: bootconsole [udbg0] disabled&lt;BR /&gt;printk: bootconsole [udbg0] disabled&lt;BR /&gt;serial8250.0: ttyS1 at MMIO 0xffe11c600 (irq = 36, base_baud = 18750000) is a 16550A_FSL64&lt;BR /&gt;serial8250.0: ttyS2 at MMIO 0xffe11d500 (irq = 37, base_baud = 18750000) is a 16550A_FSL64&lt;BR /&gt;serial8250.0: ttyS3 at MMIO 0xffe11d600 (irq = 37, base_baud = 18750000) is a 16550A_FSL64&lt;BR /&gt;ePAPR hypervisor byte channel driver&lt;BR /&gt;brd: module loaded&lt;BR /&gt;loop: module loaded&lt;BR /&gt;st: Version 20160209, fixed bufsize 32768, s/g segs 256&lt;BR /&gt;fsl-sata ffe220000.sata: Sata FSL Platform/CSB Driver init&lt;BR /&gt;scsi host0: sata_fsl&lt;BR /&gt;ata1: SATA max UDMA/133 irq 68&lt;BR /&gt;fsl-sata ffe221000.sata: Sata FSL Platform/CSB Driver init&lt;BR /&gt;scsi host1: sata_fsl&lt;BR /&gt;ata2: SATA max UDMA/133 irq 69&lt;BR /&gt;fsl_espi ffe110000.spi: cs=0, init_csmode=0x100008&lt;BR /&gt;fsl_espi ffe110000.spi: cs=3, init_csmode=0x100008&lt;BR /&gt;spi-nor spi0.0: n25q512ax3 (65536 Kbytes)&lt;BR /&gt;ftl_cs: FTL header not found.&lt;BR /&gt;fsl_espi ffe110000.spi: irq = 53&lt;BR /&gt;platform ffe488000.port: Adding to iommu group 19&lt;BR /&gt;platform ffe489000.port: Adding to iommu group 22&lt;BR /&gt;platform ffe48a000.port: Adding to iommu group 23&lt;BR /&gt;platform ffe48b000.port: Adding to iommu group 24&lt;BR /&gt;platform ffe48c000.port: Adding to iommu group 25&lt;BR /&gt;fsl_dpaa_mac ffe4e6000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e6000) failed&lt;BR /&gt;fsl_dpaa_mac ffe4e6000.ethernet: FMan MEMAC&lt;BR /&gt;fsl_dpaa_mac ffe4e8000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e8000) failed&lt;BR /&gt;fsl_dpaa_mac ffe4e8000.ethernet: FMan MEMAC&lt;BR /&gt;fsl_dpaa_mac ffe4e0000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e0000) failed&lt;BR /&gt;fsl_dpaa_mac ffe4e0000.ethernet: FMan MEMAC&lt;BR /&gt;fsl_dpaa_mac ffe4e2000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e2000) failed&lt;BR /&gt;fsl_dpaa_mac ffe4e2000.ethernet: FMan MEMAC&lt;BR /&gt;fsl_dpaa_mac ffe4e4000.ethernet: of_get_mac_address(/soc@ffe000000/fman@400000/ethernet@e4000) failed&lt;BR /&gt;fsl_dpaa_mac ffe4e4000.ethernet: FMan MEMAC&lt;BR /&gt;fsl_dpaa_mac ffe4e6000.ethernet: Using random MAC address: 12:52:59:6f:b5:14&lt;BR /&gt;fsl_dpaa_mac ffe4e6000.ethernet eth0: Probed interface eth0&lt;BR /&gt;fsl_dpaa_mac ffe4e8000.ethernet: Using random MAC address: b6:c0:77:ea:80:a4&lt;BR /&gt;fsl_dpaa_mac ffe4e8000.ethernet eth1: Probed interface eth1&lt;BR /&gt;fsl_dpaa_mac ffe4e0000.ethernet: Using random MAC address: a2:37:b7:e3:92:03&lt;BR /&gt;fsl_dpaa_mac ffe4e0000.ethernet eth2: Probed interface eth2&lt;BR /&gt;fsl_dpaa_mac ffe4e2000.ethernet: Using random MAC address: b2:5f:6d:e5:98:02&lt;BR /&gt;fsl_dpaa_mac ffe4e2000.ethernet eth3: Probed interface eth3&lt;BR /&gt;fsl_dpaa_mac ffe4e4000.ethernet: Using random MAC address: fe:71:82:b0:a4:22&lt;BR /&gt;fsl_dpaa_mac ffe4e4000.ethernet eth4: Probed interface eth4&lt;BR /&gt;e1000: Intel(R) PRO/1000 Network Driver&lt;BR /&gt;e1000: Copyright (c) 1999-2006 Intel Corporation.&lt;BR /&gt;e1000e: Intel(R) PRO/1000 Network Driver&lt;BR /&gt;e1000e: Copyright(c) 1999 - 2015 Intel Corporation.&lt;BR /&gt;igb: Intel(R) Gigabit Ethernet Network Driver&lt;BR /&gt;igb: Copyright (c) 2007-2014 Intel Corporation.&lt;BR /&gt;ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver&lt;BR /&gt;ehci-pci: EHCI PCI platform driver&lt;BR /&gt;ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver&lt;BR /&gt;ohci-pci: OHCI PCI platform driver&lt;BR /&gt;ehci-fsl: Freescale EHCI Host controller driver&lt;BR /&gt;fsl-ehci fsl-ehci.0: Freescale On-Chip EHCI Host Controller&lt;BR /&gt;ata1: No Device OR PHYRDY change,Hstatus = 0xa0000000&lt;BR /&gt;ata2: No Device OR PHYRDY change,Hstatus = 0x80000000&lt;BR /&gt;ata2: SATA link down (SStatus 10 SControl 300)&lt;BR /&gt;fsl-ehci fsl-ehci.0: new USB bus registered, assigned bus number 1&lt;BR /&gt;ata1: SATA link down (SStatus 10 SControl 300)&lt;BR /&gt;fsl-ehci fsl-ehci.0: irq 44, io mem 0xffe210000&lt;BR /&gt;fsl-ehci fsl-ehci.0: USB 2.0 started, EHCI 1.00&lt;BR /&gt;hub 1-0:1.0: USB hub found&lt;BR /&gt;hub 1-0:1.0: 1 port detected&lt;BR /&gt;fsl-ehci fsl-ehci.1: Freescale On-Chip EHCI Host Controller&lt;BR /&gt;fsl-ehci fsl-ehci.1: new USB bus registered, assigned bus number 2&lt;BR /&gt;fsl-ehci fsl-ehci.1: irq 45, io mem 0xffe211000&lt;BR /&gt;fsl-ehci fsl-ehci.1: USB 2.0 started, EHCI 1.00&lt;BR /&gt;hub 2-0:1.0: USB hub found&lt;BR /&gt;hub 2-0:1.0: 1 port detected&lt;BR /&gt;usbcore: registered new interface driver usb-storage&lt;BR /&gt;i2c_dev: i2c /dev entries driver&lt;BR /&gt;mpc-i2c ffe118000.i2c: timeout 1000000 us&lt;BR /&gt;mpc-i2c ffe118100.i2c: timeout 1000000 us&lt;BR /&gt;mpc-i2c ffe119000.i2c: timeout 1000000 us&lt;BR /&gt;mpc-i2c ffe119100.i2c: timeout 1000000 us&lt;BR /&gt;i2c i2c-1: Added multiplexed i2c bus 4&lt;BR /&gt;i2c i2c-1: Added multiplexed i2c bus 5&lt;BR /&gt;i2c i2c-1: Added multiplexed i2c bus 6&lt;BR /&gt;i2c i2c-1: Added multiplexed i2c bus 7&lt;BR /&gt;pca954x 1-0077: registered 4 multiplexed busses for I2C switch pca9546&lt;BR /&gt;ptp_qoriq: device tree node missing required elements, try automatic configuration&lt;BR /&gt;pps pps0: new PPS source ptp0&lt;BR /&gt;sdhci: Secure Digital Host Controller Interface driver&lt;BR /&gt;sdhci: Copyright(c) Pierre Ossman&lt;BR /&gt;sdhci-pltfm: SDHCI platform and OF driver helper&lt;BR /&gt;caam ffe300000.crypto: device ID = 0x0a12040000000000 (Era 6)&lt;BR /&gt;caam ffe300000.crypto: job rings = 4, qi = 1&lt;BR /&gt;platform ffe301000.jr: Adding to iommu group 26&lt;BR /&gt;platform ffe302000.jr: Adding to iommu group 27&lt;BR /&gt;platform ffe303000.jr: Adding to iommu group 28&lt;BR /&gt;platform ffe304000.jr: Adding to iommu group 29&lt;BR /&gt;mmc0: SDHCI controller on ffe114000.sdhc [ffe114000.sdhc] using ADMA 64-bit&lt;BR /&gt;caam algorithms registered in /proc/crypto&lt;BR /&gt;caam ffe300000.crypto: caam pkc algorithms registered in /proc/crypto&lt;BR /&gt;caam ffe300000.crypto: rng crypto API alg registered prng-caam&lt;BR /&gt;caam ffe300000.crypto: registering rng-caam&lt;BR /&gt;Device caam-keygen registered&lt;BR /&gt;Freescale hypervisor management driver&lt;BR /&gt;fsl-hv: no hypervisor found&lt;BR /&gt;ipip: IPv4 and MPLS over IPv4 tunneling driver&lt;BR /&gt;Initializing XFRM netlink socket&lt;BR /&gt;NET: Registered PF_INET6 protocol family&lt;BR /&gt;Segment Routing with IPv6&lt;BR /&gt;In-situ OAM (IOAM) with IPv6&lt;BR /&gt;sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver&lt;BR /&gt;NET: Registered PF_PACKET protocol family&lt;BR /&gt;NET: Registered PF_KEY protocol family&lt;BR /&gt;Key type dns_resolver registered&lt;BR /&gt;drmem: No dynamic reconfiguration memory found&lt;BR /&gt;ALSA device list:&lt;BR /&gt;No soundcards found.&lt;BR /&gt;Waiting for root device /dev/mmcblk0p2...&lt;BR /&gt;mmc0: new high speed SDHC card at address e624&lt;BR /&gt;mmcblk0: mmc0:e624 SS08G 7.40 GiB&lt;BR /&gt;mmcblk0: p1 p2&lt;BR /&gt;random: crng init done&lt;BR /&gt;EXT4-fs (mmcblk0p2): warning: mounting fs with errors, running e2fsck is recommended&lt;BR /&gt;EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null). Quota mode: disabled.&lt;BR /&gt;VFS: Mounted root (ext4 filesystem) on device 179:2.&lt;BR /&gt;devtmpfs: mounted&lt;BR /&gt;Freeing unused kernel image (initmem) memory: 452K&lt;BR /&gt;This architecture does not have kernel memory protection.&lt;BR /&gt;Run /sbin/init as init process&lt;BR /&gt;INIT: version 2.99 booting&lt;BR /&gt;Starting udev&lt;BR /&gt;udevd[248]: starting version 3.2.10&lt;BR /&gt;udevd[249]: starting eudev-3.2.10&lt;BR /&gt;fsl_dpaa_mac ffe4e0000.ethernet fm1-gb0: renamed from eth2&lt;BR /&gt;Freescale QUICC Engine UART device driver&lt;BR /&gt;fsl_dpaa_mac ffe4e2000.ethernet fm1-gb1: renamed from eth3&lt;BR /&gt;ffe142200.ucc: ttyQE0 at MMIO 0xffe142200 (irq = 40, base_baud = 9375000) is a QE&lt;BR /&gt;ucc_uart ffe142200.ucc: UCC3 assigned to /dev/ttyQE0&lt;BR /&gt;fsl_dpaa_mac ffe4e4000.ethernet fm1-gb2: renamed from eth4&lt;BR /&gt;fsl_dpaa_mac ffe4e6000.ethernet fm1-gb3: renamed from eth0&lt;BR /&gt;fsl_dpaa_mac ffe4e8000.ethernet fm1-gb4: renamed from eth1&lt;BR /&gt;FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.&lt;BR /&gt;EXT4-fs (mmcblk0p2): re-mounted. Opts: (null). Quota mode: disabled.&lt;BR /&gt;sysctl: cannot stat /proc/sys/net/ipv4/tcp_syncookies: No such file or directory&lt;BR /&gt;hwclock: Cannot access the Hardware Clock via any known method.&lt;BR /&gt;hwclock: Use the --verbose option to see the details of our search for an access method.&lt;BR /&gt;Fri Mar 9 12:34:56 UTC 2018&lt;BR /&gt;hwclock: Cannot access the Hardware Clock via any known method.&lt;BR /&gt;hwclock: Use the --verbose option to see the details of our search for an access method.&lt;BR /&gt;INIT: Entering runlevel: 5&lt;BR /&gt;Configuring network interfaces... done.&lt;BR /&gt;Starting random number generator daemon.&lt;BR /&gt;Starting OpenBSD Secure Shell server: sshd&lt;BR /&gt;done.&lt;BR /&gt;hwclock: Cannot access the Hardware Clock via any known method.&lt;BR /&gt;hwclock: Use the --verbose option to see the details of our search for an access method.&lt;BR /&gt;Starting network benchmark server: netserver.&lt;BR /&gt;Starting system log daemon...0&lt;BR /&gt;Starting internet superserver: xinetd.&lt;BR /&gt;daemon not start due to lack of /dev/watchdog&lt;/P&gt;&lt;P&gt;QorIQ SDK (FSL Reference Distro) 3.4.1 t1042d4rdb ttyS0&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 09 May 2026 14:08:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2362759#M5396</guid>
      <dc:creator>Ganesh3955</dc:creator>
      <dc:date>2026-05-09T14:08:34Z</dc:date>
    </item>
    <item>
      <title>Re: Invalid PCIe Header while Loading AMDGPU on T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2364096#M5403</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Please provide&amp;nbsp;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;lspci -vvv -s 01:00.0&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Output&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Your currecnt DTS&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&lt;SPAN&gt;Input "&lt;/SPAN&gt;&lt;SPAN&gt;reginfo&lt;/SPAN&gt;&lt;SPAN&gt;" in the U-boot.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Tue, 12 May 2026 10:56:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2364096#M5403</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2026-05-12T10:56:16Z</dc:date>
    </item>
    <item>
      <title>Re: Invalid PCIe Header while Loading AMDGPU on T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2364217#M5405</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/204495"&gt;@June_Lu&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Please find below results,&lt;BR /&gt;&lt;BR /&gt;root@t1042d4rdb:~# lspci -vvv -s 01:00.0&lt;BR /&gt;0001:01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Lexa [Radeon 540X/550X/630 / RX 640 / E9171 MCM] (rev 80) (prog-if 00 [VGA controller])&lt;BR /&gt;Subsystem: Hightech Information System Ltd. Device 2389&lt;BR /&gt;Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-&lt;BR /&gt;Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast &amp;gt;TAbort- &amp;lt;TAbort- &amp;lt;MAbort- &amp;gt;SERR- &amp;lt;PERR- INTx-&lt;BR /&gt;Latency: 0, Cache Line Size: 32 bytes&lt;BR /&gt;Interrupt: pin A routed to IRQ 41&lt;BR /&gt;IOMMU group: 21&lt;BR /&gt;Region 0: Memory at c10000000 (64-bit, prefetchable) [size=256M]&lt;BR /&gt;Region 2: Memory at c20000000 (64-bit, prefetchable) [size=2M]&lt;BR /&gt;Region 4: I/O ports at 1100 [size=256]&lt;BR /&gt;Region 5: Memory at 80000000 (32-bit, non-prefetchable) [size=256K]&lt;BR /&gt;Expansion ROM at 80040000 [size=128K]&lt;BR /&gt;Capabilities: [48] Vendor Specific Information: Len=08 &amp;lt;?&amp;gt;&lt;BR /&gt;Capabilities: [50] Power Management version 3&lt;BR /&gt;Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1+,D2+,D3hot+,D3cold+)&lt;BR /&gt;Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-&lt;BR /&gt;Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00&lt;BR /&gt;DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s &amp;lt;4us, L1 unlimited&lt;BR /&gt;ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-&lt;BR /&gt;DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-&lt;BR /&gt;RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+&lt;BR /&gt;MaxPayload 128 bytes, MaxReadReq 512 bytes&lt;BR /&gt;DevSta: CorrErr+ NonFatalErr- FatalErr- UnsupReq+ AuxPwr- TransPend-&lt;BR /&gt;LnkCap: Port #0, Speed 8GT/s, Width x8, ASPM L1, Exit Latency L1 &amp;lt;1us&lt;BR /&gt;ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+&lt;BR /&gt;LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-&lt;BR /&gt;ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-&lt;BR /&gt;LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)&lt;BR /&gt;TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-&lt;BR /&gt;DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR+&lt;BR /&gt;10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt+ EETLPPrefix+, MaxEETLPPrefixes 1&lt;BR /&gt;EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-&lt;BR /&gt;FRS-&lt;BR /&gt;AtomicOpsCap: 32bit+ 64bit+ 128bitCAS-&lt;BR /&gt;DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,&lt;BR /&gt;AtomicOpsCtl: ReqEn-&lt;BR /&gt;LnkCap2: Supported Link Speeds: 2.5-8GT/s, Crosslink- Retimer- 2Retimers- DRS-&lt;BR /&gt;LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-&lt;BR /&gt;Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-&lt;BR /&gt;Compliance De-emphasis: -6dB&lt;BR /&gt;LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-&lt;BR /&gt;EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-&lt;BR /&gt;Retimer- 2Retimers- CrosslinkRes: unsupported&lt;BR /&gt;Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+&lt;BR /&gt;Address: 0000000000000000 Data: 0000&lt;BR /&gt;Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 &amp;lt;?&amp;gt;&lt;BR /&gt;Capabilities: [150 v2] Advanced Error Reporting&lt;BR /&gt;UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;BR /&gt;UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-&lt;BR /&gt;CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;BR /&gt;AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-&lt;BR /&gt;MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-&lt;BR /&gt;HeaderLog: 00000000 00000000 00000000 00000000&lt;BR /&gt;Capabilities: [200 v1] Physical Resizable BAR&lt;BR /&gt;BAR 0: current size: 256MB, supported: 256MB 512MB 1GB 2GB 4GB&lt;BR /&gt;Capabilities: [270 v1] Secondary PCI Express&lt;BR /&gt;LnkCtl3: LnkEquIntrruptEn- PerformEqu-&lt;BR /&gt;LaneErrStat: 0&lt;BR /&gt;Capabilities: [2b0 v1] Address Translation Service (ATS)&lt;BR /&gt;ATSCap: Invalidate Queue Depth: 00&lt;BR /&gt;ATSCtl: Enable-, Smallest Translation Unit: 00&lt;BR /&gt;Capabilities: [2c0 v1] Page Request Interface (PRI)&lt;BR /&gt;PRICtl: Enable- Reset-&lt;BR /&gt;PRISta: RF- UPRGI- Stopped+&lt;BR /&gt;Page Request Capacity: 00000020, Page Request Allocation: 00000000&lt;BR /&gt;Capabilities: [2d0 v1] Process Address Space ID (PASID)&lt;BR /&gt;PASIDCap: Exec+ Priv+, Max PASID Width: 10&lt;BR /&gt;PASIDCtl: Enable- Exec- Priv-&lt;BR /&gt;Capabilities: [320 v1] Latency Tolerance Reporting&lt;BR /&gt;Max snoop latency: 0ns&lt;BR /&gt;Max no snoop latency: 0ns&lt;BR /&gt;Capabilities: [328 v1] Alternative Routing-ID Interpretation (ARI)&lt;BR /&gt;ARICap: MFVC- ACS-, Next Function: 1&lt;BR /&gt;ARICtl: MFVC- ACS-, Function Group: 0&lt;BR /&gt;Capabilities: [370 v1] L1 PM Substates&lt;BR /&gt;L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+&lt;BR /&gt;PortCommonModeRestoreTime=0us PortTPowerOnTime=170us&lt;BR /&gt;L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-&lt;BR /&gt;T_CommonMode=0us LTR1.2_Threshold=0ns&lt;BR /&gt;L1SubCtl2: T_PwrOn=10us&lt;BR /&gt;Kernel modules: amdgpu&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;U-boot:&lt;/P&gt;&lt;P&gt;=&amp;gt; reginfo&lt;BR /&gt;TLBCAM entries&lt;BR /&gt;entry 00: V: 1 EPN 0xfffff000 RPN 0x7ffff000 size:4 KiB&lt;BR /&gt;entry 01: V: 1 EPN 0xfe000000 RPN 0xffe000000 size:16 MiB&lt;BR /&gt;entry 02: V: 1 EPN 0xe0000000 RPN 0xfe0000000 size:256 MiB&lt;BR /&gt;entry 03: V: 1 EPN 0x80000000 RPN 0xc00000000 size:1 GiB&lt;BR /&gt;entry 04: V: 1 EPN 0xf8000000 RPN 0xff8000000 size:256 KiB&lt;BR /&gt;entry 05: V: 1 EPN 0xf4000000 RPN 0xff4000000 size:16 MiB&lt;BR /&gt;entry 06: V: 1 EPN 0xf5000000 RPN 0xff5000000 size:16 MiB&lt;BR /&gt;entry 07: V: 1 EPN 0xf6000000 RPN 0xff6000000 size:16 MiB&lt;BR /&gt;entry 08: V: 1 EPN 0xf7000000 RPN 0xff7000000 size:16 MiB&lt;BR /&gt;entry 09: V: 1 EPN 0xf0000000 RPN 0xf00000000 size:4 MiB&lt;BR /&gt;entry 10: V: 1 EPN 0xff800000 RPN 0xfff800000 size:64 KiB&lt;BR /&gt;entry 11: V: 1 EPN 0xffdc0000 RPN 0xfffdc0000 size:256 KiB&lt;BR /&gt;entry 12: V: 1 EPN 0x00000000 RPN 0x00000000 size:1 GiB&lt;BR /&gt;entry 13: V: 1 EPN 0x40000000 RPN 0x40000000 size:1 GiB&lt;BR /&gt;entry 14: V: 1 EPN 0x00000000 RPN 0x00000000 size:1 GiB&lt;BR /&gt;entry 15: V: 1 EPN 0x40000000 RPN 0x40000000 size:1 GiB&lt;BR /&gt;entry 16: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 17: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 18: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 19: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 20: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 21: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 22: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 23: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 24: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 25: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 26: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 27: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 28: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 29: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 30: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 31: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 32: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 33: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 34: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 35: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 36: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 37: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 38: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 39: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 40: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 41: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 42: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 43: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 44: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 45: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 46: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 47: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 48: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 49: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 50: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 51: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 52: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 53: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 54: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 55: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 56: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 57: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 58: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 59: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 60: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 61: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 62: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;BR /&gt;entry 63: V: 0 EPN 0x30000000 RPN 0x30000000 size:4 KiB&lt;/P&gt;&lt;P&gt;Local Access Window Configuration&lt;BR /&gt;LAWBARH00: 0x0000000f LAWBARL00: 0xe8000000 LAWAR00: 0x81f0001b&lt;BR /&gt;(EN: 1 TGT: 0x1f SIZE: 256 MiB)&lt;BR /&gt;LAWBARH01: 0x0000000f LAWBARL01: 0xf4000000 LAWAR01: 0x81800018&lt;BR /&gt;(EN: 1 TGT: 0x18 SIZE: 32 MiB)&lt;BR /&gt;LAWBARH02: 0x0000000f LAWBARL02: 0xf6000000 LAWAR02: 0x83c00018&lt;BR /&gt;(EN: 1 TGT: 0x3c SIZE: 32 MiB)&lt;BR /&gt;LAWBARH03: 0x0000000f LAWBARL03: 0xffdf0000 LAWAR03: 0x81f00010&lt;BR /&gt;(EN: 1 TGT: 0x1f SIZE: 128 KiB)&lt;BR /&gt;LAWBARH04: 0x0000000f LAWBARL04: 0x00000000 LAWAR04: 0x81d00015&lt;BR /&gt;(EN: 1 TGT: 0x1d SIZE: 4 MiB)&lt;BR /&gt;LAWBARH05: 0x0000000f LAWBARL05: 0xff800000 LAWAR05: 0x81f0000f&lt;BR /&gt;(EN: 1 TGT: 0x1f SIZE: 64 KiB)&lt;BR /&gt;LAWBARH06: 0x0000000c LAWBARL06: 0x00000000 LAWAR06: 0x8000001b&lt;BR /&gt;(EN: 1 TGT: 0x00 SIZE: 256 MiB)&lt;BR /&gt;LAWBARH07: 0x0000000f LAWBARL07: 0xf8000000 LAWAR07: 0x8000000f&lt;BR /&gt;(EN: 1 TGT: 0x00 SIZE: 64 KiB)&lt;BR /&gt;LAWBARH08: 0x0000000c LAWBARL08: 0x10000000 LAWAR08: 0x8010001b&lt;BR /&gt;(EN: 1 TGT: 0x01 SIZE: 256 MiB)&lt;BR /&gt;LAWBARH09: 0x0000000f LAWBARL09: 0xf8010000 LAWAR09: 0x8010000f&lt;BR /&gt;(EN: 1 TGT: 0x01 SIZE: 64 KiB)&lt;BR /&gt;LAWBARH10: 0x0000000c LAWBARL10: 0x20000000 LAWAR10: 0x8020001b&lt;BR /&gt;(EN: 1 TGT: 0x02 SIZE: 256 MiB)&lt;BR /&gt;LAWBARH11: 0x0000000f LAWBARL11: 0xf8020000 LAWAR11: 0x8020000f&lt;BR /&gt;(EN: 1 TGT: 0x02 SIZE: 64 KiB)&lt;BR /&gt;LAWBARH12: 0x0000000c LAWBARL12: 0x30000000 LAWAR12: 0x8030001b&lt;BR /&gt;(EN: 1 TGT: 0x03 SIZE: 256 MiB)&lt;BR /&gt;LAWBARH13: 0x0000000f LAWBARL13: 0xf8030000 LAWAR13: 0x8030000f&lt;BR /&gt;(EN: 1 TGT: 0x03 SIZE: 64 KiB)&lt;BR /&gt;LAWBARH14: 0x00000000 LAWBARL14: 0x00000000 LAWAR14: 0x00000000&lt;BR /&gt;(EN: 0 TGT: 0x00 SIZE: 2 Bytes)&lt;BR /&gt;LAWBARH15: 0x00000000 LAWBARL15: 0x00000000 LAWAR15: 0x8100001f&lt;BR /&gt;(EN: 1 TGT: 0x10 SIZE: 4 GiB)&lt;BR /&gt;IFC Controller Registers&lt;BR /&gt;CSPR0:0xE8000101 AMASK0:0xF8000000 CSOR0:0x0000000C&lt;BR /&gt;IFC_FTIM0:0x40050005&lt;BR /&gt;IFC_FTIM1:0x35001A13&lt;BR /&gt;IFC_FTIM2:0x0410381C&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR1:0xFF800083 AMASK1:0xFFFF0000 CSOR1:0x8510A100&lt;BR /&gt;IFC_FTIM0:0x0E18070A&lt;BR /&gt;IFC_FTIM1:0x32390E18&lt;BR /&gt;IFC_FTIM2:0x01E0501E&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR2:0xFFDF0085 AMASK2:0xFFFF0000 CSOR2:0x00000000&lt;BR /&gt;IFC_FTIM0:0xE00E000E&lt;BR /&gt;IFC_FTIM1:0x0E001F00&lt;BR /&gt;IFC_FTIM2:0x0E20001F&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR3:0x00000000 AMASK3:0x00000000 CSOR3:0x0000000C&lt;BR /&gt;IFC_FTIM0:0x00000000&lt;BR /&gt;IFC_FTIM1:0x00000000&lt;BR /&gt;IFC_FTIM2:0x00000000&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR4:0x00000000 AMASK4:0x00000000 CSOR4:0x0000000C&lt;BR /&gt;IFC_FTIM0:0x00000000&lt;BR /&gt;IFC_FTIM1:0x00000000&lt;BR /&gt;IFC_FTIM2:0x00000000&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR5:0x00000000 AMASK5:0x00000000 CSOR5:0x0000000C&lt;BR /&gt;IFC_FTIM0:0x00000000&lt;BR /&gt;IFC_FTIM1:0x00000000&lt;BR /&gt;IFC_FTIM2:0x00000000&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR6:0x00000000 AMASK6:0x00000000 CSOR6:0x0000000C&lt;BR /&gt;IFC_FTIM0:0x00000000&lt;BR /&gt;IFC_FTIM1:0x00000000&lt;BR /&gt;IFC_FTIM2:0x00000000&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;CSPR7:0x00000000 AMASK7:0x00000000 CSOR7:0x0000000C&lt;BR /&gt;IFC_FTIM0:0x00000000&lt;BR /&gt;IFC_FTIM1:0x00000000&lt;BR /&gt;IFC_FTIM2:0x00000000&lt;BR /&gt;IFC_FTIM3:0x00000000&lt;BR /&gt;=&amp;gt;&lt;BR /&gt;CTRL-A Z for help | 115200 8N1 | NOR | Minicom 2.7.1 | VT102 | Offline | ttyUSB0&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 12 May 2026 13:59:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2364217#M5405</guid>
      <dc:creator>Ganesh3955</dc:creator>
      <dc:date>2026-05-12T13:59:53Z</dc:date>
    </item>
    <item>
      <title>Re: Invalid PCIe Header while Loading AMDGPU on T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2366625#M5413</link>
      <description>&lt;P style="margin-top: 7pt; margin-bottom: 0pt; font-family: -apple-system; font-size: 10.5pt; color: #172b4d;"&gt;&lt;SPAN&gt;Below log suggests that T1040 read returns garbage, suggesting an issue with the outbound window configuration.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin-top: 7pt; margin-bottom: 0pt; font-family: -apple-system; font-size: 10.5pt; color: #172b4d;"&gt;&lt;SPAN&gt;amdgpu 0001:01:00.0: Invalid PCI ROM header signature: expecting 0xaa55, got&amp;nbsp;0xadde.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin-top: 7pt; margin-bottom: 0pt; font-family: -apple-system; font-size: 10.5pt; color: #172b4d;"&gt;&lt;SPAN&gt;Which might suggest that the PCIe outbound window programming might be missing.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="margin-top: 7pt; margin-bottom: 0pt; font-family: -apple-system; font-size: 10.5pt; color: #172b4d;"&gt;&lt;SPAN&gt;Can you please share the full the kernel bootargs used for T1040RDB with AMDGPU.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 18 May 2026 03:10:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2366625#M5413</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2026-05-18T03:10:44Z</dc:date>
    </item>
    <item>
      <title>Re: Invalid PCIe Header while Loading AMDGPU on T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2367994#M5415</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/262041"&gt;@Ganesh3955&lt;/a&gt;&amp;nbsp;Have you solved the issue? if not, please kindly provide:&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Below log suggests that T1040 read returns garbage, suggesting an issue with the outbound window configuration.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;amdgpu 0001:01:00.0: Invalid PCI ROM header signature: expecting 0xaa55, got&amp;nbsp;0xadde.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Which might suggest that the PCIe outbound window programming might be missing.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Can you please share the full the kernel bootargs used for T1040RDB with AMDGPU.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 May 2026 02:29:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Invalid-PCIe-Header-while-Loading-AMDGPU-on-T1040RDB/m-p/2367994#M5415</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2026-05-20T02:29:36Z</dc:date>
    </item>
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