Inquiry Regarding Boot Configuration in T1024

satoshi-123 — Fri, 28 Mar 2025 08:54:30 GMT

Hi everyone,

I am currently designing a board to boot the T1024 from NAND flash, and the NAND I plan to use is equipped with 8-bit ECC.

In CodeWarrior Development Studio, when narrowing down the Boot Configuration options from the pull-down menu based on the specifications of the NAND (data width, page size, pages per block), only candidates with 4-bit ECC remain.

Does this imply that NAND with 8-bit ECC cannot be used, or does it indicate a potential risk of boot failure when using such NAND?

Thank you for your assistance.

Best regards,
satoshi

Re: Inquiry Regarding Boot Configuration in T1024

Oswalag — Tue, 01 Apr 2025 16:51:11 GMT

Sorry, but 8-bit ECC is not supported for 512- and 2048-byte pages, please refer to chapter 23.5.6.2 BCH encoding of the RM.

For 4-bit correction, 8 parity bytes, 8-bit correction 16 parity bytes, 24-bit correction 42
parity bytes, and 40-bit correction 70 parity bytes per sector are required. These parity
bytes are stored in the spare region of the page at offset 08h. For small pages, only 4-bit
mode is allowed. For a 2 KB page, four sectors of 512 bytes each can be present in the
main region; hence a total of 4x8= 32 parity bytes are store at offset 08h. For a 4 KB
page size, eight sectors of 512 bytes each can be present; hence 8x8 =64 parity bytes are
required for 4-bit mode and 128 bytes for 8-bit mode.

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Inquiry Regarding Boot Configuration in T1024

Re: Inquiry Regarding Boot Configuration in T1024