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    <title>topic Re: Reset vector address and loading u-boot in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/Reset-vector-address-and-loading-u-boot/m-p/1945379#M5022</link>
    <description>&lt;P&gt;For boot from NOR flash, the system always fetches the first instruction from the end of NOR flash.&lt;/P&gt;
&lt;P&gt;You need to build u-boot image to configure reset vector at the end of NOR flash. For example:&lt;/P&gt;
&lt;P&gt;#ifndef CONFIG_RESET_VECTOR_ADDRESS&lt;BR /&gt;#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc&lt;BR /&gt;#endif&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_FLASH_BASE 0xe8000000&lt;/P&gt;</description>
    <pubDate>Mon, 02 Sep 2024 09:48:17 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2024-09-02T09:48:17Z</dc:date>
    <item>
      <title>Reset vector address and loading u-boot</title>
      <link>https://community.nxp.com/t5/T-Series/Reset-vector-address-and-loading-u-boot/m-p/1942208#M5020</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;We are working on a custom board with T2081 SOC. I am new to the Tseries chip and when I go through the RM, I came across following section, "Boot Space Translation" where it is mentioned that&amp;nbsp;&lt;/P&gt;&lt;P&gt;```&lt;/P&gt;&lt;P&gt;When each core comes out of reset, its MMU has one 4 KB page defined at&lt;BR /&gt;0x0_FFFF_Fnnn. Each core begins execution with the instruction at effective address&lt;BR /&gt;0x0_FFFF_FFFC. To get this instruction, the core's first instruction fetch is a burst read&lt;BR /&gt;of boot code from effective address 0x0_FFFF_FFC0&lt;/P&gt;&lt;P&gt;```&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;So my question is, If I flash u-boot binary in NOR flash, how the core knows about the exact address of NOR flash to load u-boot image from NOR flash address and load to DDR.&lt;/P&gt;&lt;P&gt;Is there any register or configuration which instructs PC to jump to u-boot vector address and starts loading u-boot from NOR address when core begins execution at&amp;nbsp;0x0_FFFF_FFFC?&lt;/P&gt;&lt;P&gt;&lt;LI-PRODUCT title="T2080RDB" id="T2080RDB"&gt;&lt;/LI-PRODUCT&gt;&amp;nbsp;&lt;LI-PRODUCT title="T2080" id="T2080"&gt;&lt;/LI-PRODUCT&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Noufal P&lt;/P&gt;</description>
      <pubDate>Wed, 28 Aug 2024 11:22:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Reset-vector-address-and-loading-u-boot/m-p/1942208#M5020</guid>
      <dc:creator>noufalp90</dc:creator>
      <dc:date>2024-08-28T11:22:16Z</dc:date>
    </item>
    <item>
      <title>Re: Reset vector address and loading u-boot</title>
      <link>https://community.nxp.com/t5/T-Series/Reset-vector-address-and-loading-u-boot/m-p/1945379#M5022</link>
      <description>&lt;P&gt;For boot from NOR flash, the system always fetches the first instruction from the end of NOR flash.&lt;/P&gt;
&lt;P&gt;You need to build u-boot image to configure reset vector at the end of NOR flash. For example:&lt;/P&gt;
&lt;P&gt;#ifndef CONFIG_RESET_VECTOR_ADDRESS&lt;BR /&gt;#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc&lt;BR /&gt;#endif&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_FLASH_BASE 0xe8000000&lt;/P&gt;</description>
      <pubDate>Mon, 02 Sep 2024 09:48:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Reset-vector-address-and-loading-u-boot/m-p/1945379#M5022</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2024-09-02T09:48:17Z</dc:date>
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