<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic T1024 COP connection in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1805206#M4824</link>
    <description>&lt;P&gt;I have a design layout using a T1024 processor. The design uses JTAG/COP for debug/programming. For the JTAG/COP do I need to connect the JTAG/COP to the processor HRESET_B, or can I leave&amp;nbsp;HRESET_B as not-connected?&amp;nbsp;&lt;/P&gt;&lt;P&gt;The T1 series migration guide (AN5079) says reset assertion should only use PORESET_B, and there is no soft reset. This seems to suggest the processor HRESET_B should not be connected.&lt;/P&gt;&lt;P&gt;The CodeWarrior TAP manual (CWTAPUG) section 9 says COP SRST_B (pin11) 'may' be connected. Does this say pin11 is optional? Will the emulator work correctly if COP SRST_B is not connected?&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Paul&lt;/P&gt;</description>
    <pubDate>Mon, 12 Feb 2024 11:30:30 GMT</pubDate>
    <dc:creator>PaulWalker</dc:creator>
    <dc:date>2024-02-12T11:30:30Z</dc:date>
    <item>
      <title>T1024 COP connection</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1805206#M4824</link>
      <description>&lt;P&gt;I have a design layout using a T1024 processor. The design uses JTAG/COP for debug/programming. For the JTAG/COP do I need to connect the JTAG/COP to the processor HRESET_B, or can I leave&amp;nbsp;HRESET_B as not-connected?&amp;nbsp;&lt;/P&gt;&lt;P&gt;The T1 series migration guide (AN5079) says reset assertion should only use PORESET_B, and there is no soft reset. This seems to suggest the processor HRESET_B should not be connected.&lt;/P&gt;&lt;P&gt;The CodeWarrior TAP manual (CWTAPUG) section 9 says COP SRST_B (pin11) 'may' be connected. Does this say pin11 is optional? Will the emulator work correctly if COP SRST_B is not connected?&lt;/P&gt;&lt;P&gt;Kind regards,&lt;/P&gt;&lt;P&gt;Paul&lt;/P&gt;</description>
      <pubDate>Mon, 12 Feb 2024 11:30:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1805206#M4824</guid>
      <dc:creator>PaulWalker</dc:creator>
      <dc:date>2024-02-12T11:30:30Z</dc:date>
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    <item>
      <title>Re: T1024 COP connection</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1806068#M4825</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please find in the&amp;nbsp;QorIQ T1024 Family Design Checklist - Chapter&amp;nbsp;5.21.2 JTAG system-level recommendations:&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Correct operation of the JTAG interface requires configuration of a group of system control pins as demonstrated in Figure 23. Care must be taken to ensure that these pins are maintained at a valid deasserted state under normal operating conditions,&lt;BR /&gt;as most have asynchronous behavior and spurious assertion gives unpredictable results.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Oswalag_0-1707849869129.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/263009i63B48728C7987EF8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Oswalag_0-1707849869129.png" alt="Oswalag_0-1707849869129.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 13 Feb 2024 18:45:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1806068#M4825</guid>
      <dc:creator>Oswalag</dc:creator>
      <dc:date>2024-02-13T18:45:01Z</dc:date>
    </item>
    <item>
      <title>Re: T1024 COP connection</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1806381#M4828</link>
      <description>&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;That's the same diagram as in the T1024 datasheet (chapter 4.5). I've been using this as a reference. What I wanted to know is what the minimum connections are required to support the COP.&amp;nbsp;I have a working board now and have determined that:&lt;/P&gt;&lt;P&gt;HRESET_B must be pulled-up to OVDD (via a 1K resister).&lt;/P&gt;&lt;P&gt;System board reset (from FPGA/CPLD) must be connected to&amp;nbsp;PORESET_B and&amp;nbsp;TRST_B.&lt;/P&gt;&lt;P&gt;COP_HRESET_B must be connected to PORESET_B.&lt;/P&gt;&lt;P&gt;COP_SRESET_B not-connected.&amp;nbsp;&lt;/P&gt;&lt;P&gt;COP_TRST_B must be connected to TRST_B.&lt;/P&gt;&lt;P&gt;The above arrangement works ok. My original question was about HRESET_B, which I discovered must be either connected to logic or pulled-up. I also discovered the CodeWarrior TAP emulator does not appear to use COP_SRESET_B so can be left not-connected.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks again.&lt;/P&gt;</description>
      <pubDate>Wed, 14 Feb 2024 11:39:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-COP-connection/m-p/1806381#M4828</guid>
      <dc:creator>PaulWalker</dc:creator>
      <dc:date>2024-02-14T11:39:52Z</dc:date>
    </item>
  </channel>
</rss>

