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    <title>topic Re: T1042 NOR Boot in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616701#M4599</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52411"&gt;@yipingwang&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Yes we have used different IFC NOR flash on our custom board from T1042RDB.&lt;/P&gt;&lt;P&gt;Before trying to boot from NOR-FLASH, as I previosuly said, I have successfully boot from SDCARD. After this, I have tested and verified that all of the other peripherals on the board, i.e. NAND-flash, PCIe, Ethernet, and NOR-FLASH were working properly.&lt;/P&gt;&lt;P&gt;At that verification step, I had&amp;nbsp;changed the settings(/* NOR Flash Timing Params */) in *include/configs/T104xRDB.h* in order to access NOR-FLASH. (Mostly non-timing related parameters, data width, bank count etc...) Nevertheless, I have executed a full write/read test on IFC-NOR flash, and it was successful.&amp;nbsp;I should also mention that I am writing RCW, FMAN microcode and U-BOOT.bin to the NOR-FLASH by using u-boot commands. (erase, cp.b etc...)&lt;/P&gt;&lt;P&gt;Briefly, I can access IFC NOR-FLASH when I boot from SDCARD, but although same settings are used in&amp;nbsp;u-boot-nor-2016.09+fslgit-r0.bin, it fails to boot from NOR-flash.&lt;/P&gt;&lt;P&gt;I will check the timing parameters to be sure.&amp;nbsp;But does the situation I described above make sense?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mustafa&lt;/P&gt;</description>
    <pubDate>Thu, 16 Mar 2023 11:14:36 GMT</pubDate>
    <dc:creator>mdursun</dc:creator>
    <dc:date>2023-03-16T11:14:36Z</dc:date>
    <item>
      <title>T1042 NOR Boot</title>
      <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1615426#M4595</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to boot from NOR FLASH for T1042 processor. Swicthes are set to boot from NOR-FLASH.&lt;/P&gt;&lt;P&gt;I have written the images to the following addresses of NOR flash.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;0xE8000000 - PBL.bin ( Generated by QCVS)&lt;/LI&gt;&lt;LI&gt;0xEFF00000 - FMAN ucode.bin&lt;/LI&gt;&lt;LI&gt;0xEFF40000&amp;nbsp;- u-boot-nor-2016.09+fslgit-r0.bin&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Initial stage of the boot is being successful, it means that RCW is read from the NOR-flash. However nothing happens after it.&lt;/P&gt;&lt;P&gt;T1042 has a 256kB CPC (that can be configured as SRAM). Since u-boot-nor-2016.09+fslgit-r0.bin is 768kB, I assume that there would be a Secondary Program Loader (SPL).&lt;/P&gt;&lt;P&gt;At first stage an SPL shall be loaded to the CPC from NOR-FLASH. Then SPL,&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;shall initialize the DDR,&lt;/LI&gt;&lt;LI&gt;shall copy U-BOOT.bin from NOR-FLASH to the DDR,&lt;/LI&gt;&lt;LI&gt;shall jump to the U-BOOT code.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;However I couldn't find any SPL binary in QORIQ SDK directories. Where can I find this binary file?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mustafa&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 05:39:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1615426#M4595</guid>
      <dc:creator>mdursun</dc:creator>
      <dc:date>2023-03-15T05:39:25Z</dc:date>
    </item>
    <item>
      <title>Re: T1042 NOR Boot</title>
      <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1615558#M4596</link>
      <description>&lt;P&gt;&lt;SPAN&gt;u-boot-nor-2016.09+fslgit-r0.bin is 768kB, that is the correct size of whole NOR flash u-boot image.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;There is no SPL for&amp;nbsp;NOR FLASH u-boot, u-boot boots directly from NOR flash then initializes DDR and copies u-boot image to DDR and jump executing from DDR.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;u-boot provided in QorIQ SDK 2.0 is used for T1042RDB demo board, you need to modify u-boot source code according to your custom board.&lt;/P&gt;
&lt;P&gt;DDR controller initialization section provided in SDK 2.0 u-boot for T1042RDB is not suitable for your custom board, you need to modify u-boot source code board/freescale/t104xrdb/ddr.h according to your custom board.&lt;/P&gt;
&lt;P&gt;You could refer to this document&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-Bringing-up/ta-p/1128310" target="_blank"&gt;https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-Bringing-up/ta-p/1128310&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 09:01:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1615558#M4596</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2023-03-15T09:01:09Z</dc:date>
    </item>
    <item>
      <title>Re: T1042 NOR Boot</title>
      <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1615679#M4597</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52411"&gt;@yipingwang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for the clarification of the SPL issue for NOR-FLASH boot.&lt;/P&gt;&lt;P&gt;Previously, I have changed the DDR.h file according to our custom board DDR and successfully boot u-boot from SDCARD with those settings. I am using same DDR.h file for&amp;nbsp;u-boot-nor-2016.09+fslgit-r0.bin but it stucks.&lt;/P&gt;&lt;P&gt;Following is the list of the files that I have changed to make source codes copliant with our custom-board.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN&gt;T1042D4RDB_defconfig /git/configs&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;t1042d4_sd_rcw.cfg /git/board/freescale/t104xrdb&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;t104x_pbi.cfg /git/board/freescale/t104xrdb&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;law.c /git/board/freescale/t104xrdb&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;ddr.c /git/board/freescale/t104xrdb&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;ddr.h /git/board/freescale/t104xrdb&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;fsl_esdhc_spl.c /git/drivers/mmc&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN&gt;Can there be a setting that effects NOR-boot in above files?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is there any other required modification on source codes for NOR-boot?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Mustafa&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 11:38:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1615679#M4597</guid>
      <dc:creator>mdursun</dc:creator>
      <dc:date>2023-03-15T11:38:16Z</dc:date>
    </item>
    <item>
      <title>Re: T1042 NOR Boot</title>
      <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616456#M4598</link>
      <description>&lt;P&gt;If you use different IFC NOR flash on your custom board from T1042RDB, you need to modify NOR flash IFC timing configuration section in u-boot.&lt;/P&gt;
&lt;P&gt;You need to modify the following section in u-boot source code&amp;nbsp;include/configs/T104xRDB.h.&lt;/P&gt;
&lt;P&gt;/* NOR Flash Timing Params */&lt;BR /&gt;#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80&lt;BR /&gt;#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \&lt;BR /&gt;FTIM0_NOR_TEADC(0x5) | \&lt;BR /&gt;FTIM0_NOR_TEAHC(0x5))&lt;BR /&gt;#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \&lt;BR /&gt;FTIM1_NOR_TRAD_NOR(0x1A) |\&lt;BR /&gt;FTIM1_NOR_TSEQRAD_NOR(0x13))&lt;BR /&gt;#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \&lt;BR /&gt;FTIM2_NOR_TCH(0x4) | \&lt;BR /&gt;FTIM2_NOR_TWPH(0x0E) | \&lt;BR /&gt;FTIM2_NOR_TWP(0x1c))&lt;BR /&gt;#define CONFIG_SYS_NOR_FTIM3 0x0&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_FLASH_QUIET_TEST&lt;BR /&gt;#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */&lt;BR /&gt;#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */&lt;BR /&gt;#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */&lt;BR /&gt;#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */&lt;/P&gt;
&lt;P&gt;#define CONFIG_SYS_FLASH_EMPTY_INFO&lt;BR /&gt;#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS}&lt;/P&gt;
&lt;P&gt;You could refer to&amp;nbsp;&lt;A href="https://community.nxp.com/t5/Layerscape-Knowledge-Base/IFC-Controller-Configuration-on-QorIQ-Custom-Boards/ta-p/1109156" target="_blank"&gt;https://community.nxp.com/t5/Layerscape-Knowledge-Base/IFC-Controller-Configuration-on-QorIQ-Custom-Boards/ta-p/1109156&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 06:30:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616456#M4598</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2023-03-16T06:30:21Z</dc:date>
    </item>
    <item>
      <title>Re: T1042 NOR Boot</title>
      <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616701#M4599</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52411"&gt;@yipingwang&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Yes we have used different IFC NOR flash on our custom board from T1042RDB.&lt;/P&gt;&lt;P&gt;Before trying to boot from NOR-FLASH, as I previosuly said, I have successfully boot from SDCARD. After this, I have tested and verified that all of the other peripherals on the board, i.e. NAND-flash, PCIe, Ethernet, and NOR-FLASH were working properly.&lt;/P&gt;&lt;P&gt;At that verification step, I had&amp;nbsp;changed the settings(/* NOR Flash Timing Params */) in *include/configs/T104xRDB.h* in order to access NOR-FLASH. (Mostly non-timing related parameters, data width, bank count etc...) Nevertheless, I have executed a full write/read test on IFC-NOR flash, and it was successful.&amp;nbsp;I should also mention that I am writing RCW, FMAN microcode and U-BOOT.bin to the NOR-FLASH by using u-boot commands. (erase, cp.b etc...)&lt;/P&gt;&lt;P&gt;Briefly, I can access IFC NOR-FLASH when I boot from SDCARD, but although same settings are used in&amp;nbsp;u-boot-nor-2016.09+fslgit-r0.bin, it fails to boot from NOR-flash.&lt;/P&gt;&lt;P&gt;I will check the timing parameters to be sure.&amp;nbsp;But does the situation I described above make sense?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mustafa&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 11:14:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616701#M4599</guid>
      <dc:creator>mdursun</dc:creator>
      <dc:date>2023-03-16T11:14:36Z</dc:date>
    </item>
    <item>
      <title>Re: T1042 NOR Boot</title>
      <link>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616924#M4600</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52411"&gt;@yipingwang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;The problem is solved in two steps.&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;Since I was assuming that DDR will be used in NOR-flash, BOOT_LOC was selected as Memory Complex1, in my RCW settings. I changed it to be IFC but this alone did not solve the problem.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class=""&gt;Just to try it out, I deleted all the PBI commands added to the end of the RCW. Then it boot from NOR-flash.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN class=""&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Mustafa&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 14:42:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1042-NOR-Boot/m-p/1616924#M4600</guid>
      <dc:creator>mdursun</dc:creator>
      <dc:date>2023-03-16T14:42:09Z</dc:date>
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