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    <title>topic Re: T1024 DDR in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1516619#M4516</link>
    <description>&lt;P&gt;&lt;SPAN&gt;For the same board type (same HW and SW/settings), the time it takes to clear the D_INIT would be constantly the same. &lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 05 Sep 2022 01:45:58 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2022-09-05T01:45:58Z</dc:date>
    <item>
      <title>T1024 DDR</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1507389#M4508</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;During the DDR initialization software is setting D_INIT bit and after initialization is done software waits for this bit to be cleared. Hardware will clear this bit after the initialization is complete.&amp;nbsp; Clearing of D_INIT bit is consistent for all T1024 hardware’s or it will changing with variation of environmental factor (temperature or electromagnetic effect) or any other factors?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="BharathiG_1-1660727558895.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/190494iD8090418BC0A0A8F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="BharathiG_1-1660727558895.png" alt="BharathiG_1-1660727558895.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 17 Aug 2022 09:13:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1507389#M4508</guid>
      <dc:creator>BharathiG</dc:creator>
      <dc:date>2022-08-17T09:13:16Z</dc:date>
    </item>
    <item>
      <title>Re: T1024 DDR</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1509828#M4511</link>
      <description>&lt;P&gt;&lt;SPAN&gt;The clearing of D_INIT bit is done 100% of time by HW if DDR initialization completes. &lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 23 Aug 2022 02:28:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1509828#M4511</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-08-23T02:28:35Z</dc:date>
    </item>
    <item>
      <title>Re: T1024 DDR</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1515292#M4515</link>
      <description>&lt;P&gt;I accept what you said and we are seeing the clearing of D_INIT bit by hardware. Powerup to powerup will their be any variations (timing variations) in clearing this bit ? Will it be consistently clearing the bit?&lt;/P&gt;</description>
      <pubDate>Thu, 01 Sep 2022 06:47:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1515292#M4515</guid>
      <dc:creator>BharathiG</dc:creator>
      <dc:date>2022-09-01T06:47:37Z</dc:date>
    </item>
    <item>
      <title>Re: T1024 DDR</title>
      <link>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1516619#M4516</link>
      <description>&lt;P&gt;&lt;SPAN&gt;For the same board type (same HW and SW/settings), the time it takes to clear the D_INIT would be constantly the same. &lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Sep 2022 01:45:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1024-DDR/m-p/1516619#M4516</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-09-05T01:45:58Z</dc:date>
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