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    <title>topic Re: Hi, in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351675#M42</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, thank you. I am unable to find&amp;nbsp; A0 - A25. I am beginner in this field. Can you please help.&lt;span class="lia-inline-image-display-wrapper" image-alt="635590723367673515.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50367iB471D46F4C03B0C3/image-size/large?v=v2&amp;amp;px=999" role="button" title="635590723367673515.png" alt="635590723367673515.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 09 Feb 2015 04:26:56 GMT</pubDate>
    <dc:creator>rahulsoni</dc:creator>
    <dc:date>2015-02-09T04:26:56Z</dc:date>
    <item>
      <title>Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351673#M40</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to interface&lt;SPAN style="color: #222222; font-size: 10pt; font-family: arial, sans-serif;"&gt; T4240 freescale processor with S29GL01GS11TFIV1 NOR flash. Can you tell me which Latch i should use. Also provide the connections for interfacing.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #222222; font-size: 10pt; font-family: arial, sans-serif;"&gt;Thank You.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;\&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Feb 2015 09:34:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351673#M40</guid>
      <dc:creator>rahulsoni</dc:creator>
      <dc:date>2015-02-05T09:34:42Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351674#M41</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can use any Latch that supports 1.8V power supply. FPGA or PLD can also be used.&lt;/P&gt;&lt;P&gt;Basic connections between the NOR flash and T4240 are as following:&lt;/P&gt;&lt;P&gt;Flash&amp;nbsp;&amp;nbsp; -&amp;nbsp; Processor&lt;/P&gt;&lt;P&gt;--------------------------------&lt;/P&gt;&lt;P&gt;&lt;EM&gt;data&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;DQ0&amp;nbsp; -&amp;nbsp; IFC_AD15&amp;nbsp; &lt;/P&gt;&lt;P&gt;DQ1&amp;nbsp; -&amp;nbsp; IFC_AD14&amp;nbsp; &lt;/P&gt;&lt;P&gt;DQ2&amp;nbsp; -&amp;nbsp; IFC_AD13&lt;/P&gt;&lt;P&gt;...&amp;nbsp; &lt;/P&gt;&lt;P&gt;DQ15&amp;nbsp; -&amp;nbsp; IFC_AD0&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;address&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;A0&amp;nbsp; -&amp;nbsp; IFC_A30&amp;nbsp; &lt;/P&gt;&lt;P&gt;A1&amp;nbsp; -&amp;nbsp; IFC_A29&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;A4&amp;nbsp; -&amp;nbsp; IFC_A26&lt;/P&gt;&lt;P&gt;A5&amp;nbsp; -&amp;nbsp; latched IFC_AD25&amp;nbsp; &lt;/P&gt;&lt;P&gt;A6&amp;nbsp; -&amp;nbsp; latched IFC_AD24&amp;nbsp; &lt;/P&gt;&lt;P&gt;A7&amp;nbsp; -&amp;nbsp; latched IFC_AD23&amp;nbsp; &lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;A25&amp;nbsp; -&amp;nbsp; latched IFC_AD5&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;control&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;CE&amp;nbsp; -&amp;nbsp; IFC_CS0&lt;/P&gt;&lt;P&gt;OE&amp;nbsp; -&amp;nbsp; IFC_OE&lt;/P&gt;&lt;P&gt;WE&amp;nbsp; -&amp;nbsp; IFC_WE0&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 Feb 2015 10:11:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351674#M41</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2015-02-06T10:11:40Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351675#M42</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, thank you. I am unable to find&amp;nbsp; A0 - A25. I am beginner in this field. Can you please help.&lt;span class="lia-inline-image-display-wrapper" image-alt="635590723367673515.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50367iB471D46F4C03B0C3/image-size/large?v=v2&amp;amp;px=999" role="button" title="635590723367673515.png" alt="635590723367673515.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Feb 2015 04:26:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351675#M42</guid>
      <dc:creator>rahulsoni</dc:creator>
      <dc:date>2015-02-09T04:26:56Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351676#M43</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Left column lists signals of the NOR flash, including A0 - A25. Take a look at U2 device in your schematics, you will easily find these signals.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Feb 2015 06:28:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351676#M43</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2015-02-09T06:28:30Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351677#M44</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you &lt;A _jive_internal="true" data-avatarid="1034" data-content-finding="Community" data-externalid="" data-online="false" data-presence="null" data-userid="208520" data-username="bulat" href="https://community.nxp.com/people/bulat" style="color: #8b8b8b; font-weight: bold; font-size: 12px; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #f6f6f6;"&gt;Bulat Karymov&lt;/A&gt;, but i wanted to know h&lt;SPAN style="color: #222222; font-family: arial, sans-serif; font-size: 12.8000001907349px;"&gt;ow to connect AD[0:26] to D Latch when i have only 16 input pins in the latch. I mean either i must have 26 pins in D Latch or&amp;nbsp; some pins of processor must be " No Connect". If i have to connect latched AD5 to AD25, then still i need 21 pins in my latch, which is not available.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Feb 2015 06:42:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351677#M44</guid>
      <dc:creator>rahulsoni</dc:creator>
      <dc:date>2015-02-09T06:42:45Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351678#M45</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In your figure the latch is 16-bit one. Since you need to latch 21 address signals, you need to add one latch device more. You can probably arrange three 8-bit latch devices. Without extending address latch, you will not be able to address 128MByte Flash memory.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Feb 2015 12:36:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351678#M45</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2015-02-09T12:36:18Z</dc:date>
    </item>
    <item>
      <title>Re: Hi,</title>
      <link>https://community.nxp.com/t5/T-Series/Hi/m-p/351679#M46</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Feb 2015 09:21:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Hi/m-p/351679#M46</guid>
      <dc:creator>rahulsoni</dc:creator>
      <dc:date>2015-02-10T09:21:51Z</dc:date>
    </item>
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