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    <title>topic Re: T2080 PCIe transfer error with PAMU enabled in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1329147#M4180</link>
    <description>&lt;P&gt;&lt;SPAN&gt;What the cmd buffer address is for your GPU access?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Can you try this GPU on T2080RDB board?&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 25 Aug 2021 06:22:08 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2021-08-25T06:22:08Z</dc:date>
    <item>
      <title>T2080 PCIe transfer error with PAMU enabled</title>
      <link>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1310923#M4143</link>
      <description>&lt;P&gt;Hi Folks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am using a linux-qoriq 5.10 kernel from freescale on a T2080RDB with an AMD e8860 GPU.&amp;nbsp;I am trying to use the AMD opensource driver (radeon and/or amdgpu drm driver). I did some big endian patches and hit an issue with the IOMMU. Here are the symptoms:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;On modprobe, the driver tests the GPU ring command. It will fill a command buffer in system memory, then the GPU fetches the buffer and executes it. As a result a scratch register of the GPU is updated and the GPU increases its read pointer into the ring.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Without fsl_pamu enabled (the Linux PAMU driver), this test works fine without triggering any access error, which indicates all translation addresses are set up properly (outbound, inbound and law).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But with fsl_pamu enabled, this test fails. The command buffer isn't executed, neither the scratch value nor the read pointer into the ring are updated. Moreover, the fsl_pamu driver doesn't trigger any access error.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I dig a little further and found something strange. The AMD e8860 GPU supports PCIe AER. With fsl_pamu enabled, after the ring test, the GPU will log a TLP error with the following header :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Capabilities: [150 v2] Advanced Error Reporting&lt;/P&gt;&lt;P&gt;UESta: DLP- SDES- TLP+ FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;/P&gt;&lt;P&gt;UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-&lt;/P&gt;&lt;P&gt;UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-&lt;/P&gt;&lt;P&gt;CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-&lt;/P&gt;&lt;P&gt;CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+&lt;/P&gt;&lt;P&gt;AERCap: First Error Pointer: 0c, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-&lt;/P&gt;&lt;P&gt;MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-&lt;/P&gt;&lt;P&gt;HeaderLog: 4a004010 00000040 11002000 00000000&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As you can see, the header log tells us:&lt;/P&gt;&lt;P&gt;0x4a004010: fmt 0x2 / type 0xa -&amp;gt; completion with data -&amp;nbsp;Ep 1 -&amp;gt; poisoned TLP -&amp;nbsp;Length 0x10&lt;/P&gt;&lt;P&gt;0x00000040: Completer ID 0x0000 (my PCIe root port on the T2080) -&amp;nbsp;Byte count : 0x40&lt;/P&gt;&lt;P&gt;0x11002000: Requester ID 0x1100 (my AMD e8860 GPU 11:0.0) - Tag 0x20 - Lower address 0x00&lt;/P&gt;&lt;P&gt;0x00000000: Data 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;So due to the EP bit set (poisoned TLP), this is logged as a bad TLP and the GPU seems to silently discard it (no errors reported through EDAC layer). Usually EP bit is set when there is an ECRC error due to link issue but without fsl_pamu, I don’t have any errors which let me thinks the physical integrity of the link is not the cause.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any ideas ?&lt;/P&gt;&lt;P&gt;Thomas&lt;/P&gt;</description>
      <pubDate>Wed, 21 Jul 2021 05:11:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1310923#M4143</guid>
      <dc:creator>Toumou</dc:creator>
      <dc:date>2021-07-21T05:11:16Z</dc:date>
    </item>
    <item>
      <title>Re: T2080 PCIe transfer error with PAMU enabled</title>
      <link>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1312491#M4147</link>
      <description>&lt;OL&gt;
&lt;LI&gt;&lt;SPAN&gt; AFAIK, T2080RDB has not been tested under 5.10 kernel, so could you check it with LSDK-2012 or yocto 3.1 release for verification?&lt;/SPAN&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;SPAN&gt; Does it work after changing the GPU card to other PCIe card such as e1000?&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please help to check above test results first.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 23 Jul 2021 09:11:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1312491#M4147</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-07-23T09:11:47Z</dc:date>
    </item>
    <item>
      <title>Re: T2080 PCIe transfer error with PAMU enabled</title>
      <link>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1320848#M4166</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Sorry for late answer, summer holidays !&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The GPU is behind a PCIe switch. Behind the same PCIe switch, alongside the GPU, there is a V4L2 video device which also performs DMA to/from system memory. And this v4l2 has no issue with its DMA.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Also I tested multiple kernel versions, from 4.14 to 5.10 (LSDK or not) and still get the same issue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Unfortunately I don't have another GPU to test with...&lt;/P&gt;</description>
      <pubDate>Tue, 10 Aug 2021 06:46:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1320848#M4166</guid>
      <dc:creator>Toumou</dc:creator>
      <dc:date>2021-08-10T06:46:11Z</dc:date>
    </item>
    <item>
      <title>Re: T2080 PCIe transfer error with PAMU enabled</title>
      <link>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1329147#M4180</link>
      <description>&lt;P&gt;&lt;SPAN&gt;What the cmd buffer address is for your GPU access?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Can you try this GPU on T2080RDB board?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 25 Aug 2021 06:22:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080-PCIe-transfer-error-with-PAMU-enabled/m-p/1329147#M4180</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-08-25T06:22:08Z</dc:date>
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