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    <title>T-SeriesのトピックRe: T1022 Serdes Configuration</title>
    <link>https://community.nxp.com/t5/T-Series/T1022-Serdes-Configuration/m-p/1307334#M4129</link>
    <description>&lt;P&gt;According to the PCIe specs it is possible connect only lane 0 of PCIe x2 port to PCIe x1 device. The PCIe Link Training and Status State Machine recognizes the maximum link width both devices support.&lt;/P&gt;</description>
    <pubDate>Wed, 14 Jul 2021 04:47:18 GMT</pubDate>
    <dc:creator>r8070z</dc:creator>
    <dc:date>2021-07-14T04:47:18Z</dc:date>
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      <title>T1022 Serdes Configuration</title>
      <link>https://community.nxp.com/t5/T-Series/T1022-Serdes-Configuration/m-p/1306721#M4126</link>
      <description>&lt;P&gt;I want to connect T1022 in PCIe x4 configuration and SGMII on other ports. So, I have to use 0x40 Serdes configuration. 0x40 configuration has one PCIe x2 , one PCIe x4 and SGMII on other ports. But even X1 PCIe is sufficient for my requirement. So, is it possible that I connect only lane 0 of the PCIe x2 port to the end point device and run PCIe in x1 mode ? Or is it necessary to connect both the lanes of PCIe port even for PCIe x1 to work?&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jul 2021 08:34:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1022-Serdes-Configuration/m-p/1306721#M4126</guid>
      <dc:creator>swatig</dc:creator>
      <dc:date>2021-07-13T08:34:01Z</dc:date>
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    <item>
      <title>Re: T1022 Serdes Configuration</title>
      <link>https://community.nxp.com/t5/T-Series/T1022-Serdes-Configuration/m-p/1307334#M4129</link>
      <description>&lt;P&gt;According to the PCIe specs it is possible connect only lane 0 of PCIe x2 port to PCIe x1 device. The PCIe Link Training and Status State Machine recognizes the maximum link width both devices support.&lt;/P&gt;</description>
      <pubDate>Wed, 14 Jul 2021 04:47:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T1022-Serdes-Configuration/m-p/1307334#M4129</guid>
      <dc:creator>r8070z</dc:creator>
      <dc:date>2021-07-14T04:47:18Z</dc:date>
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