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    <title>topic Machine Check on T2080 in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/Machine-Check-on-T2080/m-p/1275223#M4063</link>
    <description>&lt;P&gt;I have an SBC with a T2080 processor that runs a VxWorks environment.&lt;/P&gt;&lt;P&gt;About half an hour into operation our VxWorks environment is rebooting with a machine check. The messages are similar to:&lt;/P&gt;&lt;P&gt;Exception at interrupt level:&lt;/P&gt;&lt;P&gt;machine check&lt;BR /&gt;Exception next instruction address: 0x0f266998&lt;BR /&gt;Machine Status Register: 0x00029230&lt;BR /&gt;Condition Register: 0x28002242&lt;BR /&gt;Machine Check Syndrome Register: 0x0000a000&lt;BR /&gt;Machine Check Address Register: 0x00000000&lt;BR /&gt;Regs at 0x76c1d88&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The next instruction address varies. The status register has some bits that change.&lt;/P&gt;&lt;P&gt;Condition register and syndrome register are always the same.&lt;/P&gt;&lt;P&gt;I tried to look up the syndrome register information but the &lt;A href="https://www.nxp.com/files-static/32bit/doc/ref_manual/EREF_RM.pdf" target="_blank" rel="noopener"&gt;Power Architecture Programmer's Reference for the e6500&lt;/A&gt; says most of the bits of the Machine Check Syndrome Register (MCSR) are implementation specific.&lt;/P&gt;&lt;P&gt;The &lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/power-architecture/qoriq-communication-processors/t-series/qoriq-t2080-and-t2081-multicore-communications-processors:T2080?tab=Documentation_Tab" target="_blank" rel="noopener"&gt;QorIQ T2080 Reference Manual&lt;/A&gt; doesn't contain any further explanation.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any documentation describing the bits of the Machine Check Syndrome Register and/or the Condition Register?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
    <pubDate>Tue, 11 May 2021 22:15:56 GMT</pubDate>
    <dc:creator>BrandonC</dc:creator>
    <dc:date>2021-05-11T22:15:56Z</dc:date>
    <item>
      <title>Machine Check on T2080</title>
      <link>https://community.nxp.com/t5/T-Series/Machine-Check-on-T2080/m-p/1275223#M4063</link>
      <description>&lt;P&gt;I have an SBC with a T2080 processor that runs a VxWorks environment.&lt;/P&gt;&lt;P&gt;About half an hour into operation our VxWorks environment is rebooting with a machine check. The messages are similar to:&lt;/P&gt;&lt;P&gt;Exception at interrupt level:&lt;/P&gt;&lt;P&gt;machine check&lt;BR /&gt;Exception next instruction address: 0x0f266998&lt;BR /&gt;Machine Status Register: 0x00029230&lt;BR /&gt;Condition Register: 0x28002242&lt;BR /&gt;Machine Check Syndrome Register: 0x0000a000&lt;BR /&gt;Machine Check Address Register: 0x00000000&lt;BR /&gt;Regs at 0x76c1d88&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The next instruction address varies. The status register has some bits that change.&lt;/P&gt;&lt;P&gt;Condition register and syndrome register are always the same.&lt;/P&gt;&lt;P&gt;I tried to look up the syndrome register information but the &lt;A href="https://www.nxp.com/files-static/32bit/doc/ref_manual/EREF_RM.pdf" target="_blank" rel="noopener"&gt;Power Architecture Programmer's Reference for the e6500&lt;/A&gt; says most of the bits of the Machine Check Syndrome Register (MCSR) are implementation specific.&lt;/P&gt;&lt;P&gt;The &lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/power-architecture/qoriq-communication-processors/t-series/qoriq-t2080-and-t2081-multicore-communications-processors:T2080?tab=Documentation_Tab" target="_blank" rel="noopener"&gt;QorIQ T2080 Reference Manual&lt;/A&gt; doesn't contain any further explanation.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any documentation describing the bits of the Machine Check Syndrome Register and/or the Condition Register?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Tue, 11 May 2021 22:15:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Machine-Check-on-T2080/m-p/1275223#M4063</guid>
      <dc:creator>BrandonC</dc:creator>
      <dc:date>2021-05-11T22:15:56Z</dc:date>
    </item>
    <item>
      <title>Re: Machine Check on T2080</title>
      <link>https://community.nxp.com/t5/T-Series/Machine-Check-on-T2080/m-p/1275314#M4064</link>
      <description>&lt;P&gt;Please refer to the e6500 Core Reference Manual, 2.9.10 Machine Check Syndrome (MCSR) register:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/reference-manual/E6500RM.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/reference-manual/E6500RM.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 12 May 2021 03:33:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/Machine-Check-on-T2080/m-p/1275314#M4064</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-05-12T03:33:46Z</dc:date>
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