topic Re: T2080 hardcoded RCW Clock frequency in T-Series

T2080 hardcoded RCW Clock frequency

xiaopengma — Fri, 22 Jan 2016 08:21:15 GMT

According to T2080RM,the hardcoded RCW option should be selected based on the system SYSCLK and

DDRCLK frequency combination.

The SYSCLK should be 66.7MHz and the DDRCLK should be 133.3MHz.

After loading a hard coded RCW,the platform frequency is 266MHz and the core frequency is 533MHz.

What does these frequency mean?

Can I use another clock frequency,like SYSCLK 100MHz. and DDRCLK 100MHz?

Re: T2080 hardcoded RCW Clock frequency

r8070z — Fri, 22 Jan 2016 13:04:55 GMT

Have a great day,

"The hardcoded RCW option should be selected based on the system SYSCLK and DDRCLK frequency combination." supposes that there will be different PLL ratios in the different RCW. Actually there is no choice, both hardcoded RCW provide the same PLL ratios.

In any case SYSCLK and DDRCLK frequencies and resulting core frequency, and platform clock frequency must not exceed their respective maximum or minimum operating frequencies, which are specified in the T2080 hardware specifications. Otherwise the device will not operate properly.

So we may ignore comment in the manual's Table 4-15. We have to pay attention to the PLL ratios in the Table 4-16. RCW Settings for Hard-Coded RCW and check if the resulting core frequency, and platform clock frequency will be suitable for out device.

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Re: T2080 hardcoded RCW Clock frequency

tkchaitanya — Fri, 09 Apr 2021 09:19:00 GMT

Hi,

Also kindly confirm that as per the tool there are 2 two combinations for RCWs

1. with 0x8C SysClk=66.7MHz,DDRClk=133.33MHz

2. with 0x8F SysClk=66.7MHz,DDRClk=133.33MHz

What is the difference on above both and can I use the following combination

SysClk=133.33MHz and DDRClk=66.7MHz

Kindly help on above.

Re: T2080 hardcoded RCW Clock frequency

madhurikallem — Fri, 09 Apr 2021 09:47:55 GMT

1. Your reply says that- " both hardcoded RCW provide the same PLL ratios" But table 4.16 clearly shows both HArdcoded RCW values give different PLL ratios. 2. You mentioned- "we may ignore comment in the manual's Table 4-15" and original query/post asks -The SYSCLK should be 66.7MHz and the DDRCLK should be 133.3MHz. WHereas the reference manual clearly mentions the RCW combinations as sysclk=ddrclk=66.6Mhz and sysclk=133Mhz, DDR clk=66.6 Mhz. And your reply confuses the statement given in the Reference manual. Can you please clearly state the combinations of sys_clk and DDR_clk for the Hard coded RCW if it is other than what is mentioned in the Reference manual