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    <title>topic How to test TDM links in T1040RDB in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/How-to-test-TDM-links-in-T1040RDB/m-p/1225472#M3964</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I am using T1040RDB board&amp;nbsp; and was trying to test the TDM interface in it.&lt;/P&gt;&lt;P&gt;TDM interface of T1040 is connected to cyclone FPGA and TDM coming from cyclone device is connected to Octal E1 Framer (XRT86VX38) which gives out 8 ports.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please&amp;nbsp; suggest how to configfure and test this TDM interface...&lt;/P&gt;</description>
    <pubDate>Wed, 03 Feb 2021 10:28:23 GMT</pubDate>
    <dc:creator>Suraj_Prakash</dc:creator>
    <dc:date>2021-02-03T10:28:23Z</dc:date>
    <item>
      <title>How to test TDM links in T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/How-to-test-TDM-links-in-T1040RDB/m-p/1225472#M3964</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I am using T1040RDB board&amp;nbsp; and was trying to test the TDM interface in it.&lt;/P&gt;&lt;P&gt;TDM interface of T1040 is connected to cyclone FPGA and TDM coming from cyclone device is connected to Octal E1 Framer (XRT86VX38) which gives out 8 ports.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please&amp;nbsp; suggest how to configfure and test this TDM interface...&lt;/P&gt;</description>
      <pubDate>Wed, 03 Feb 2021 10:28:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/How-to-test-TDM-links-in-T1040RDB/m-p/1225472#M3964</guid>
      <dc:creator>Suraj_Prakash</dc:creator>
      <dc:date>2021-02-03T10:28:23Z</dc:date>
    </item>
    <item>
      <title>Re: How to test TDM links in T1040RDB</title>
      <link>https://community.nxp.com/t5/T-Series/How-to-test-TDM-links-in-T1040RDB/m-p/1227503#M3966</link>
      <description>&lt;P&gt;Please download and install QorIQ Linux SDK 1.9 Source and Cache ISO from&amp;nbsp;&lt;A href="https://www.nxp.com/design/software/embedded-software/linux-software-and-development-tools/linux-sdk-for-qoriq-processors:SDKLINUX?tab=Design_Tools_Tab," target="_blank"&gt;https://www.nxp.com/design/software/embedded-software/linux-software-and-development-tools/linux-sdk-for-qoriq-processors:SDKLINUX?tab=Design_Tools_Tab,&lt;/A&gt;&amp;nbsp;which includes TDM driver.&lt;/P&gt;
&lt;P&gt;Please refer to the following procedure to test TDM interface.&lt;/P&gt;
&lt;P&gt;1.Compile the kernel&lt;BR /&gt;Device Drivers ---&amp;gt; &lt;BR /&gt;&amp;lt;*&amp;gt; TDM support ---&amp;gt;&lt;BR /&gt;--- TDM support &lt;BR /&gt;&amp;lt;*&amp;gt; TDM device interface &lt;BR /&gt;[ ] TDM Core debugging messages (NEW)&lt;BR /&gt;TDM Device support ---&amp;gt; &lt;BR /&gt;&amp;lt;*&amp;gt; Driver for Freescale Starlite TDM controller&lt;BR /&gt;&amp;lt;*&amp;gt; Zarlink Slic intialization Module&lt;BR /&gt;&amp;lt;M&amp;gt; TDM test Module &lt;BR /&gt;2.Attach two analog phones at the two FXS (FSX1 and FSX2)ports of the board before you boot the linux&lt;/P&gt;
&lt;OL start="3"&gt;
&lt;LI&gt;Set the hwconfig to enable tdm&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;setenv hwconfig fsl_ddr:bank_intlv=cs0_cs1;tdm&lt;/P&gt;
&lt;OL start="4"&gt;
&lt;LI&gt;Boot up the linux and make sure that you can see the output for tdm and slic info&lt;/LI&gt;
&lt;/OL&gt;
&lt;TABLE&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;/TD&gt;
&lt;TD&gt;
&lt;P&gt;&amp;nbsp;You can see follow info during the boot up:&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;adapter [fsl_tdm] registered&lt;/P&gt;
&lt;P&gt;SLIC: FREESCALE DEVELOPED ZARLINK SLIC DRIVER&lt;/P&gt;
&lt;P&gt;####################################################&lt;/P&gt;
&lt;P&gt;# This driver was created solely by Freescale, &amp;nbsp; &amp;nbsp; #&lt;/P&gt;
&lt;P&gt;# without the assistance, support or intellectual &amp;nbsp;#&lt;/P&gt;
&lt;P&gt;# property of Zarlink Semiconductor. No &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;#&lt;/P&gt;
&lt;P&gt;# maintenance or support will be provided by &amp;nbsp; &amp;nbsp; &amp;nbsp; #&lt;/P&gt;
&lt;P&gt;# Zarlink &amp;nbsp;Semiconductor regarding this driver. &amp;nbsp; &amp;nbsp;#&lt;/P&gt;
&lt;P&gt;####################################################&lt;/P&gt;
&lt;P&gt;SLIC probed!&lt;/P&gt;
&lt;P&gt;SLIC config success&lt;/P&gt;
&lt;P&gt;SLIC: product code 1 read is &amp;nbsp;4&lt;/P&gt;
&lt;P&gt;SLIC: product code 2 read is &amp;nbsp;b3&lt;/P&gt;
&lt;P&gt;SLIC: config read is &amp;nbsp;0&lt;/P&gt;
&lt;P&gt;SLIC: config read is &amp;nbsp;8a&lt;/P&gt;
&lt;P&gt;DEV reg is 82&lt;/P&gt;
&lt;P&gt;DEV reg after is 2&lt;/P&gt;
&lt;P&gt;Mask reg before setting is 3f bf&lt;/P&gt;
&lt;P&gt;Mask reg after setting is f6 f6&lt;/P&gt;
&lt;P&gt;Read Tx Timeslot for CH1 is 0&lt;/P&gt;
&lt;P&gt;Read Tx Timeslot for CH2 is 2&lt;/P&gt;
&lt;P&gt;Read Rx Timeslot for CH1 is 0&lt;/P&gt;
&lt;P&gt;Read Rx Timeslot for CH2 is 2&lt;/P&gt;
&lt;P&gt;Operating Fun for channel 1 is 82&lt;/P&gt;
&lt;P&gt;Cadence Timer Reg for CH1 before is 7 ff0 0&lt;/P&gt;
&lt;P&gt;Cadence Timer Reg for CH1 after is 1 903 20&lt;/P&gt;
&lt;P&gt;Switching control for channel 1 is 20&lt;/P&gt;
&lt;P&gt;Operating Fun for channel 2 is a0&lt;/P&gt;
&lt;P&gt;Cadence Timer Reg for CH2 before is 7 ff0 0&lt;/P&gt;
&lt;P&gt;Cadence Timer Reg for CH2 after is 1 903 20&lt;/P&gt;
&lt;P&gt;Switching control for channel 2 is 20&lt;/P&gt;
&lt;P&gt;SLIC 1 configuration success&lt;/P&gt;
&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;insmod the tdm test module and then pick up the two phone,Anything spoken on one phone will be heard on the other.&lt;/P&gt;
&lt;P&gt;# insmod tdm_test.ko&lt;/P&gt;
&lt;P&gt;In addition, you could verify TDM interface working in internal loopback mode, please refer to&amp;nbsp;&lt;A href="https://community.nxp.com/t5/Layerscape-Knowledge-Base/TDM-Driver-Working-in-Internal-Loopback-mode-During-Validation/ta-p/1115299" target="_blank"&gt;https://community.nxp.com/t5/Layerscape-Knowledge-Base/TDM-Driver-Working-in-Internal-Loopback-mode-During-Validation/ta-p/1115299&lt;/A&gt;&amp;nbsp;for details.&lt;/P&gt;</description>
      <pubDate>Sun, 07 Feb 2021 05:42:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/How-to-test-TDM-links-in-T1040RDB/m-p/1227503#M3966</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-02-07T05:42:16Z</dc:date>
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