topic Re: T1024 bare board code under debug and timebase ticks in T-Series

T1024 bare board code under debug and timebase ticks

eduardkromskoy — Tue, 19 Feb 2019 22:14:28 GMT

Hi,

I am trying to get some timebase ticks in "hello word" example of bare board CW project on T1024 board.

Init_sram.tcl has following lines

[code]

# enable all cores in Boot Release Register (BRRL)
mem [CCSR_ADDR 0xe00e4] = 0x00000003

# enable timebases
mem [CCSR_ADDR 0xe2084] = 0x00000003

[/code]

However, when I read SPRN_TBRL I seems always get 0. That is

asm volatile("mfspr %0, 0x10c" : "=r" (tic));

tic is always 0. Did I miss something? How to make more or less precise timing in code running under debugger?

Thank you,

Re: T1024 bare board code under debug and timebase ticks

eduardkromskoy — Wed, 20 Feb 2019 19:19:49 GMT

Ok, It might be closed. I am reading Alternate time base registers which are available at SPR 526, 527. Seems to run at core speed and freeze when debugger suspend code execution.

Thanks for inspiration.

Re: T1024 bare board code under debug and timebase ticks

Pavel — Tue, 26 Feb 2019 05:59:32 GMT

See attached simple example for timebase. It is CodeWarrior 10.5.1 project for the T1024RDB board.

Find the sl1_tbu and sl1_tbl variables in main.c file.

Have a great day,
Pavel Chubakov

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Re: T1024 bare board code under debug and timebase ticks

eduardkromskoy — Tue, 26 Feb 2019 21:39:35 GMT

Hi Pavel.

Indeed I missed Physical Core Time Base Enable Register (RCPM_PCTBENR). Added function

void timebase_init(void)
{
unsigned int m_gpr = 0;
volatile uint32_t *a = (uint32_t *)(SYS_IMMR + 0xE2000 + 0x1A0);

mtspr(285, m_gpr);
mtspr(284, m_gpr);

*a = 1;
}

Everything work as expected now. Time base registers are more convenient for my tasks as they run at 50Mhz clock as opposed to Alternate time base registers which run at 1200MHz core clock.

Thank you very much,