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    <title>topic Re: T4160RDB DDR Initialization Problem  in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855208#M2897</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Do you mean you are using T4160QDS board, purchased from NXP? Or some custom board, similar to our QDS? If you are using custom board, please let me know the full list of differences, including difference in schematic and BOM.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 07 Jan 2019 09:29:14 GMT</pubDate>
    <dc:creator>alexander_yakov</dc:creator>
    <dc:date>2019-01-07T09:29:14Z</dc:date>
    <item>
      <title>T4160RDB DDR Initialization Problem</title>
      <link>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855205#M2894</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying the &lt;STRONG&gt;DDR initialization&lt;/STRONG&gt; now on &lt;STRONG&gt;T4160RDB-64&lt;/STRONG&gt; Machine by using Codewarrior Flashprogrammer and Lauterbach Trace32 Script. DDR initialization done successfully with following means when i check DDR_ERR_DETECT it is showing Automatic Calibration Error(ACE) bit set.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DDR_ERR_DETECT[ACE] = 1.&lt;/P&gt;&lt;P&gt;Is it issue ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MMU Setup done for Flash and DDR. When access DDR (0x000) Memory the target reset.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;In Lauterbach Script&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;;MMU Setup&lt;BR /&gt;;FLASH 0xe8000000--0xefffffff (1GB)&lt;BR /&gt;MMU.TLB1.Set 0. 0xC0000A00 0xe8000008 0xe8000015 0x00000000 0x00000000&lt;BR /&gt;;DDR 0x00000000--0x3fffffff (1GB) &lt;BR /&gt;MMU.TLB1.Set 1. 0xC0000A00 0x00000000 0x00000015 0x00000000 0x00000000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What could be the issue?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Thanks &amp;amp; Regards.&lt;BR /&gt;VinothS&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 05 Jan 2019 08:50:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855205#M2894</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2019-01-05T08:50:48Z</dc:date>
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    <item>
      <title>Re: T4160RDB DDR Initialization Problem</title>
      <link>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855206#M2895</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In the previous topic you said you are using T4160QDS board, but now you are referring T4160RDB - which board you are using?&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/thread/492527"&gt;https://community.nxp.com/thread/492527&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Using DDR configuration from QDS board on RDB board may result an error.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Alexander&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 05 Jan 2019 18:46:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855206#M2895</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2019-01-05T18:46:45Z</dc:date>
    </item>
    <item>
      <title>Re: T4160RDB DDR Initialization Problem</title>
      <link>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855207#M2896</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Alexander,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am working on t4160qds target only. Once I done ddr initialization I check DDR_ERR_DETECT it showing&amp;nbsp; ERROR:&amp;nbsp;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;Automatic Calibration Error(ACE) bit set.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;DDR_ERR_DETECT[ACE] = 1.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Please give the fix for this?&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Thanks @ Regards,&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;VinothS&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 06 Jan 2019 23:56:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855207#M2896</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2019-01-06T23:56:47Z</dc:date>
    </item>
    <item>
      <title>Re: T4160RDB DDR Initialization Problem</title>
      <link>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855208#M2897</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Do you mean you are using T4160QDS board, purchased from NXP? Or some custom board, similar to our QDS? If you are using custom board, please let me know the full list of differences, including difference in schematic and BOM.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Jan 2019 09:29:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T4160RDB-DDR-Initialization-Problem/m-p/855208#M2897</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2019-01-07T09:29:14Z</dc:date>
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