topic Re: u-boot SMP Threads T2080RDB in T-Series

u-boot SMP Threads T2080RDB

albertandreasjr — Mon, 12 Feb 2018 16:59:24 GMT

Using u-boot T2080RDB_SPIFLASH_config of version V2.0-1703.

The T2080 has 4 cores with two threads. Will u-boot support having the 7 threads in the spin tables. Right now it only has the 3 cores waiting on the spin tables. (I removed addr, and r3 for brevity).

What it does now:

Running on cpu 0

pir - 0x00000002
Running on cpu 0

pir - 0x00000004
Running on cpu 0

pir - 0x00000006

I would like:

Running on cpu 1

pir - 0x00000001
Running on cpu 0

pir - 0x00000002
Running on cpu 1

pir - 0x00000003

....

Running on cpu 1

pir - 0x00000007

I am doing this to get vxWorks Boot running in SMP with SMT mode, with a modified bootInit.s.

I would like to do :

cpu 1 release <_romInit> 1 1 2

cpu 2 release <_romInit> 8 1 2

cpu 3 release <_romInit> 9 1 2

cpu 4 release <_romInit> 10 1 2

cpu 5 release <_romInit> 11 1 2

cpu 6 release <_romInit> 18 1 2

cpu 7 release <_romInit> 19 1 2

Re: u-boot SMP Threads T2080RDB

bpe — Tue, 20 Feb 2018 06:33:56 GMT

What you want to do contradicts the requirements of ePAPR,
Sections 5.4.1, 5.5.2.2, thus not verified by NXP and most likely is
not implemented. Not sure this is an actual requirement by VxWorks
because threads are not fully independent CPUs in many aspects, for
instance, they don't have separate virtual address spaces. Suggest
contacting with VxWorks for clarifications.

Best Regards,

Platon

Re: u-boot SMP Threads T2080RDB

albertandreasjr — Fri, 18 May 2018 14:49:45 GMT

I figured it out. I found a Linux checkin that gave me a hint.

https://lists.denx.de/pipermail/u-boot/2010-September/078097.html

"Some OSes require that secondary cores not be initialized when they are booted (eg VxWorks)."

So I left the cores in holdoff then allowed VxWorks to release the 7 threads