<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: No Output in U-Boot Console in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419418#M226</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Bryce,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please use the following procedure to check you system step by step.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Check the status register of sec mon block (location CCSRBAR +0x314014). Refer to the details of the register from the Reference Manual. Bits OTPMK_ZERO, OTMPK_SYNDROME and PE should be 0 otherwise there is some error in the OTPMK fuse blown by you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. If OTMPK fuse is correct (see Step 1), check the SCRATCHRW2 register for errors. Refer to Section for error codes. If Error code = 0 then check the Security Monitor state in HPSR register of Sec Mon.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. Please check SSM_ST filed of the Security Monitor state in HPSR register of Sec Mon.&lt;/P&gt;&lt;P&gt;Sec Mon in Check State (0x9)&lt;/P&gt;&lt;P&gt;It means ISBC code has reset the board. This may be due to the following reasons:&lt;/P&gt;&lt;P&gt;Hash of the public key used to sign the ESBC u-boot doesn't match with the value in SRK Hash Fuse&lt;/P&gt;&lt;P&gt;Or&lt;/P&gt;&lt;P&gt;Signature verification of the image failed Sec Mon in Trusted State (0xd) or Non Secure State (0xb)&lt;/P&gt;&lt;P&gt;Check the entry point field in the ESBC header, the address is 0xcffffffc.&lt;/P&gt;&lt;P&gt;If entry point is correct, ensure that u-boot image has been signed with the correct input file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If your problem remains, please let me know the above checking result, and also provide your input file used to signing u-boot.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yiping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 25 Jun 2015 02:04:37 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2015-06-25T02:04:37Z</dc:date>
    <item>
      <title>No Output in U-Boot Console</title>
      <link>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419415#M223</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;I am attempting to secure boot using the T1040RDB (rev 1.0) and U-boot.&amp;nbsp; Here is what I have been able to accomplish:&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;RCW from SDK (rcw_sben_1400MHz.bin) and a modified U-Boot that does not define CONFIG_SECBOOT but simply added #define CONFIG_CMD_ESBC_VALIDATE.&amp;nbsp; When I boot, I am able to verify secure boot is working by and read from 0xfe314014 which says everything is secure and trusted.&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;RCW (without SB_EN enabled or rcw_14000MHz.bin from SDK) and modified U-Boot with #define CONFIG_SECBOOT.&amp;nbsp; In this case, the ISBC process does not happen, but I am able to manually check my bootscript and ensure that the steps of the ESBC process are occurring.&amp;nbsp; &lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;What I am having trouble with is putting everything together.&amp;nbsp; At this point when I try to use both the RCW with SB_EN enabled (rcw_sben_1400MHz.bin) and U-Boot with #define CONFIG_SECBOOT, rebooting the serial console results in the system immediately locking up (I get no output back whatsoever).&amp;nbsp; I have tried waiting for a while thinking that it needs some time to make it to the Kernel, but it never happens.&amp;nbsp; To be clear, if I build U-Boot with just CONFIG_SECBOOT (no real modifications) and use the provided RCW with SB_EN bit set, then the system locks up entirely.&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;I was wondering if anyone happens to know a good way to debug this or has any suggestions as to why the secure boot doesn't reach the console.&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;&lt;/P&gt;&lt;P style="color: #222222; font-family: arial, sans-serif; font-size: small;"&gt;Thanks.&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Jun 2015 17:39:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419415#M223</guid>
      <dc:creator>bryceferguson</dc:creator>
      <dc:date>2015-06-22T17:39:11Z</dc:date>
    </item>
    <item>
      <title>Re: No Output in U-Boot Console</title>
      <link>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419416#M224</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;SPAN class="replyToName"&gt;Bryce Ferguson,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;Since you are in the testing phase, I suggest you work on bank 0 and flash secure images on bank4.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;1. For running secure boot, you need to blow OTPMK and SRK, for these register address you could refer to T1040 Reference Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;OTPMKR(0-7) Address : E_8000h base + 21Ch offset + (4d × i), where i=0d to 7d&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;SRKHRn Address: E_8000h base + 23Ch offset + (4d × i), where i=0d to 7d&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;You could write these registers from bank 0 u-boot, CCSR begins at 0xFFE00000.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;SRK hash value should be same as the hash of the key pair being used to sign the ESBC u-boot.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;OTPMK key could be generated by generated by gen_otpmk utility in cst package.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;2. You need to flash all the signed images at locations as described in the address map in SDK 1.7 User Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;Please flash these image in alternate bank, and also flash uImage, dts, rootfs, CSF header, bootscript,&amp;nbsp; because the secure u-boot can be stopped to let you enter commands.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;For signing images, probably you know the process, you could refer to "Signing the images using same key pair" section in Linux SDK 1.7 document.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;3. Switch to alternate bank from bank0, the secure boot would execute.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;You could refer to the section "Running secure boot (Chain of Trust)" in SDK User Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;Previous I created a document about "Secure boot on Non-PBL Platform" &lt;A href="https://community.nxp.com/docs/DOC-102268"&gt;Secure boot for Non-PBL Platform&lt;/A&gt;, you also could get the main process of secure boot from it.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="replyToName"&gt;If further assistance is needed, please feel free to let me know.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yiping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2015 07:35:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419416#M224</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2015-06-23T07:35:04Z</dc:date>
    </item>
    <item>
      <title>Re: No Output in U-Boot Console</title>
      <link>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419417#M225</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yiping,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for responding to my inquiry. So far I have done everything that you described the only difference being that I am in bank 4 and am flashing to bank 0.&amp;nbsp; Though this is not recommended, could it have anything to do with the fact that I still cannot perform secure boot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Bryce&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Jun 2015 17:15:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419417#M225</guid>
      <dc:creator>bryceferguson</dc:creator>
      <dc:date>2015-06-23T17:15:39Z</dc:date>
    </item>
    <item>
      <title>Re: No Output in U-Boot Console</title>
      <link>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419418#M226</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Bryce,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please use the following procedure to check you system step by step.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Check the status register of sec mon block (location CCSRBAR +0x314014). Refer to the details of the register from the Reference Manual. Bits OTPMK_ZERO, OTMPK_SYNDROME and PE should be 0 otherwise there is some error in the OTPMK fuse blown by you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. If OTMPK fuse is correct (see Step 1), check the SCRATCHRW2 register for errors. Refer to Section for error codes. If Error code = 0 then check the Security Monitor state in HPSR register of Sec Mon.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. Please check SSM_ST filed of the Security Monitor state in HPSR register of Sec Mon.&lt;/P&gt;&lt;P&gt;Sec Mon in Check State (0x9)&lt;/P&gt;&lt;P&gt;It means ISBC code has reset the board. This may be due to the following reasons:&lt;/P&gt;&lt;P&gt;Hash of the public key used to sign the ESBC u-boot doesn't match with the value in SRK Hash Fuse&lt;/P&gt;&lt;P&gt;Or&lt;/P&gt;&lt;P&gt;Signature verification of the image failed Sec Mon in Trusted State (0xd) or Non Secure State (0xb)&lt;/P&gt;&lt;P&gt;Check the entry point field in the ESBC header, the address is 0xcffffffc.&lt;/P&gt;&lt;P&gt;If entry point is correct, ensure that u-boot image has been signed with the correct input file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If your problem remains, please let me know the above checking result, and also provide your input file used to signing u-boot.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yiping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2015 02:04:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419418#M226</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2015-06-25T02:04:37Z</dc:date>
    </item>
    <item>
      <title>Re: No Output in U-Boot Console</title>
      <link>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419419#M227</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Success!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My problem was the entry point address in the input file.&amp;nbsp; I made the changes and am now able to secure boot properly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you very much,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Bryce&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Jun 2015 17:37:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/No-Output-in-U-Boot-Console/m-p/419419#M227</guid>
      <dc:creator>bryceferguson</dc:creator>
      <dc:date>2015-06-25T17:37:14Z</dc:date>
    </item>
  </channel>
</rss>

