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    <title>T-SeriesのトピックRe: T2080RDB based board halts in U-boot initialization on cold boot</title>
    <link>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720958#M2259</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Alexander,&lt;/P&gt;&lt;P&gt;There are quite a few,&amp;nbsp; I need a more specifics to give you better feedback.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Below are some bare-bones comparisons, please tell me if you need more.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Power is primarily derived from the T2080, with gaps in need rails covered by supplies from the T1042.&lt;/P&gt;&lt;P&gt;Resets handled by CPLD, based closely on that of the T2080RDB&lt;/P&gt;&lt;P&gt;RCW config handled by CPLD,&amp;nbsp; most other straps are handled by PU/PD resistors only.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Things that are mostly unchanged&lt;/P&gt;&lt;P&gt;DDR Ram&lt;/P&gt;&lt;P&gt;NOR flash&lt;/P&gt;&lt;P&gt;NAND flash&lt;/P&gt;&lt;P&gt;SPI flash&lt;/P&gt;&lt;P&gt;i2c EEPROM&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help,&lt;/P&gt;&lt;P&gt;Kyle&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 14 Dec 2017 21:13:27 GMT</pubDate>
    <dc:creator>kylevonschmacht</dc:creator>
    <dc:date>2017-12-14T21:13:27Z</dc:date>
    <item>
      <title>T2080RDB based board halts in U-boot initialization on cold boot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720956#M2257</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;To whom it may concern,&lt;/P&gt;&lt;P&gt;We're bringing up a custom board using the T2081 derived from the T2080RDB and T1042RDB.&lt;/P&gt;&lt;P&gt;SDK is QorIQ SDK 2.0 rev 1703.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We've noticed an error across all our boards.&amp;nbsp; &amp;nbsp;&lt;/P&gt;&lt;P&gt;On a cold boot the processor will halt partway through the U-boot initialization sequence, usually before it rebases to RAM.&amp;nbsp;&lt;/P&gt;&lt;P&gt;POR, Hreset, and Reset_Req_n remain high.&lt;/P&gt;&lt;P&gt;There is no activity on the NOR chip select [So it is not executing instructions from flash]&lt;/P&gt;&lt;P&gt;There is intermittent activity on the DDR Chip select, consistent with auto-refresh&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After about 5 minutes of on time, an outside reset (POR) or power-cycle with make the board boot normally, before then it halts in the same place.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've tried putting in puts() to localize where the issue is happening,&amp;nbsp; this just causes the halt location to move earlier in the sequence.&amp;nbsp; This leads me to believe the issue is independent of the code actually running, and depends more on time itself.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anyone have any insights into what this might be?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help,&lt;/P&gt;&lt;P&gt;Kyle&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Dec 2017 21:49:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720956#M2257</guid>
      <dc:creator>kylevonschmacht</dc:creator>
      <dc:date>2017-12-13T21:49:20Z</dc:date>
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    <item>
      <title>Re: T2080RDB based board halts in U-boot initialization on cold boot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720957#M2258</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please specify the difference between your board and T2080RDB board.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Alexander&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Dec 2017 05:48:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720957#M2258</guid>
      <dc:creator>alexander_yakov</dc:creator>
      <dc:date>2017-12-14T05:48:02Z</dc:date>
    </item>
    <item>
      <title>Re: T2080RDB based board halts in U-boot initialization on cold boot</title>
      <link>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720958#M2259</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Alexander,&lt;/P&gt;&lt;P&gt;There are quite a few,&amp;nbsp; I need a more specifics to give you better feedback.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Below are some bare-bones comparisons, please tell me if you need more.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Power is primarily derived from the T2080, with gaps in need rails covered by supplies from the T1042.&lt;/P&gt;&lt;P&gt;Resets handled by CPLD, based closely on that of the T2080RDB&lt;/P&gt;&lt;P&gt;RCW config handled by CPLD,&amp;nbsp; most other straps are handled by PU/PD resistors only.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Things that are mostly unchanged&lt;/P&gt;&lt;P&gt;DDR Ram&lt;/P&gt;&lt;P&gt;NOR flash&lt;/P&gt;&lt;P&gt;NAND flash&lt;/P&gt;&lt;P&gt;SPI flash&lt;/P&gt;&lt;P&gt;i2c EEPROM&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help,&lt;/P&gt;&lt;P&gt;Kyle&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Dec 2017 21:13:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/T2080RDB-based-board-halts-in-U-boot-initialization-on-cold-boot/m-p/720958#M2259</guid>
      <dc:creator>kylevonschmacht</dc:creator>
      <dc:date>2017-12-14T21:13:27Z</dc:date>
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