<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: change DDR3 from UDIMM to Chip in T-Series</title>
    <link>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533455#M1076</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;U-boot for the T1040 boards uses SPD for DDR configuring. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;See the ddr.zip file in the attachment.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Find the following line in the ddr.h file:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;static const struct board_specific_parameters udimm0[] = { &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal"&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;This structure contains the following parameters:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;n_ranks, datarate_mhz_high, rank_gb, clk_adjust, wrlvl_start, wrlvl_ctl_2, wrlvl_ctl_3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal"&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Look at the T1023RDB setting in the t102xrdb.h file. Find the CONFIG_SYS_DDR_RAW_TIMING in this file. This setting provides do not use SPD for DDR configuring. See the t102xrdb.h and ddr_t102xrdb.c files for the T102sRDB board from u-boot. See the ddr_raw_timing procedure in the ddr_t102xrdb.c file.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Use similar method for your T1040 board.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel Chubakov&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 25 Jul 2016 05:37:47 GMT</pubDate>
    <dc:creator>Pavel</dc:creator>
    <dc:date>2016-07-25T05:37:47Z</dc:date>
    <item>
      <title>change DDR3 from UDIMM to Chip</title>
      <link>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533454#M1075</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everyone, &lt;/P&gt;&lt;P&gt;I am so happy to be here. I have several questions about T1040 processor. I design a board with T1040 but I do not use from the UDIMM memory like T1040RDB. I must use from T1040RDB SDK for U-Boot kernel and ... .&lt;/P&gt;&lt;P&gt;what changes should I set in SDK with new DDR3?&lt;/P&gt;&lt;P&gt;thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 23 Jul 2016 08:31:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533454#M1075</guid>
      <dc:creator>mohamadahmadi</dc:creator>
      <dc:date>2016-07-23T08:31:01Z</dc:date>
    </item>
    <item>
      <title>Re: change DDR3 from UDIMM to Chip</title>
      <link>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533455#M1076</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;U-boot for the T1040 boards uses SPD for DDR configuring. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;See the ddr.zip file in the attachment.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Find the following line in the ddr.h file:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;static const struct board_specific_parameters udimm0[] = { &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal"&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;This structure contains the following parameters:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;n_ranks, datarate_mhz_high, rank_gb, clk_adjust, wrlvl_start, wrlvl_ctl_2, wrlvl_ctl_3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal"&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Look at the T1023RDB setting in the t102xrdb.h file. Find the CONFIG_SYS_DDR_RAW_TIMING in this file. This setting provides do not use SPD for DDR configuring. See the t102xrdb.h and ddr_t102xrdb.c files for the T102sRDB board from u-boot. See the ddr_raw_timing procedure in the ddr_t102xrdb.c file.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="xmsonormal" style="margin-bottom: .0001pt; background: white;"&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Use similar method for your T1040 board.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel Chubakov&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jul 2016 05:37:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533455#M1076</guid>
      <dc:creator>Pavel</dc:creator>
      <dc:date>2016-07-25T05:37:47Z</dc:date>
    </item>
    <item>
      <title>Re: change DDR3 from UDIMM to Chip</title>
      <link>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533456#M1077</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #303030;"&gt;Thanks &lt;SPAN class="jive-comment-meta font-color-meta-light"&gt;&lt;SPAN class="j-username-wrap"&gt;Pavel, &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-comment-meta font-color-meta-light" style="color: #303030;"&gt;&lt;SPAN class="j-username-wrap"&gt;Your answer was very helpful, I use the Linux kernel . After u-boot, what changes should I set in Linux kernel with new DDR3?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-comment-meta font-color-meta-light" style="color: #303030;"&gt;&lt;SPAN class="j-username-wrap"&gt;Thanks again.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Jul 2016 10:03:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533456#M1077</guid>
      <dc:creator>mohamadahmadi</dc:creator>
      <dc:date>2016-07-25T10:03:47Z</dc:date>
    </item>
    <item>
      <title>Re: change DDR3 from UDIMM to Chip</title>
      <link>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533457#M1078</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt; background: white;"&gt;Sorry for delay.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt; background: white;"&gt;Changes in Linux kernel are not needed.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel Chubakov&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 Aug 2016 10:49:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/533457#M1078</guid>
      <dc:creator>Pavel</dc:creator>
      <dc:date>2016-08-03T10:49:08Z</dc:date>
    </item>
    <item>
      <title>Re: change DDR3 from UDIMM to Chip</title>
      <link>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/1180773#M3880</link>
      <description>&lt;P&gt;Hi dear：&lt;/P&gt;&lt;P&gt;I have met a problem about DIMM。&lt;/P&gt;&lt;P&gt;When I boot 1046 ， A NOTICE&amp;nbsp; comes out every seconds like "NOTICE: UDIMM M4DS-AGS1QC0J-BE82".&lt;/P&gt;&lt;P&gt;Have ever met this problem&lt;/P&gt;&lt;P&gt;or Could u plz give me some advances&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;atrqua&lt;/P&gt;</description>
      <pubDate>Tue, 10 Nov 2020 12:32:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/T-Series/change-DDR3-from-UDIMM-to-Chip/m-p/1180773#M3880</guid>
      <dc:creator>atrqua</dc:creator>
      <dc:date>2020-11-10T12:32:57Z</dc:date>
    </item>
  </channel>
</rss>

