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    <title>topic Re: A71CH Memory addresses in Secure Authentication</title>
    <link>https://community.nxp.com/t5/Secure-Authentication/A71CH-Memory-addresses/m-p/899584#M66</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A71CH's I2C interface is using the following I2C spec:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/supporting-information/AN12207.pdf" title="https://www.nxp.com/docs/en/supporting-information/AN12207.pdf"&gt;https://www.nxp.com/docs/en/supporting-information/AN12207.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check with the ST tech supporter on how to use the Hal API to implement the timing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your patience and understanding!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 21 May 2019 07:20:22 GMT</pubDate>
    <dc:creator>Kan_Li</dc:creator>
    <dc:date>2019-05-21T07:20:22Z</dc:date>
    <item>
      <title>A71CH Memory addresses</title>
      <link>https://community.nxp.com/t5/Secure-Authentication/A71CH-Memory-addresses/m-p/899583#M65</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm trying to interface with A71CH using STM32F Hal functions hal_mem_write.&lt;/P&gt;&lt;P&gt;&amp;nbsp;Which writes to a specific address with size, a byte of data command PCB.&amp;nbsp;&lt;/P&gt;&lt;P&gt;What are the adddresses and what it should be ?&lt;/P&gt;&lt;P&gt;The hal function definition is like that&lt;/P&gt;&lt;DIV style="color: #000000; background-color: #ffffff; font-weight: normal; font-size: 14px;"&gt;&lt;DIV&gt;&lt;SPAN style="color: #000000;"&gt;HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef &lt;/SPAN&gt;&lt;SPAN style="color: #000000;"&gt;*&lt;/SPAN&gt;&lt;SPAN style="color: #000000;"&gt;hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t &lt;/SPAN&gt;&lt;SPAN style="color: #000000;"&gt;*&lt;/SPAN&gt;&lt;SPAN style="color: #000000;"&gt;pData, uint16_t Size, uint32_t Timeout)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;The device address is 0x48, but what should be the memAddress in A71CH ?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 18 May 2019 10:08:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Secure-Authentication/A71CH-Memory-addresses/m-p/899583#M65</guid>
      <dc:creator>ahmedtolba</dc:creator>
      <dc:date>2019-05-18T10:08:50Z</dc:date>
    </item>
    <item>
      <title>Re: A71CH Memory addresses</title>
      <link>https://community.nxp.com/t5/Secure-Authentication/A71CH-Memory-addresses/m-p/899584#M66</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A71CH's I2C interface is using the following I2C spec:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/supporting-information/AN12207.pdf" title="https://www.nxp.com/docs/en/supporting-information/AN12207.pdf"&gt;https://www.nxp.com/docs/en/supporting-information/AN12207.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check with the ST tech supporter on how to use the Hal API to implement the timing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your patience and understanding!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 May 2019 07:20:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Secure-Authentication/A71CH-Memory-addresses/m-p/899584#M66</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2019-05-21T07:20:22Z</dc:date>
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