<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: S32K BIST process problem? in SafeAssure-Community</title>
    <link>https://community.nxp.com/t5/SafeAssure-Community/S32K-BIST-process-problem/m-p/1979945#M317</link>
    <description>&lt;P&gt;Hi Li,&lt;/P&gt;
&lt;P&gt;the complete safety concept requires an external PMIC or at least a WDT as pure minimum. The WDT will detect endless loops and reset the part a number of times until it completely disables the MCU. NXP PMICs support this, the number of POR resets can be configured and read after boot. Please consult the RM/SM of the used PMIC.&lt;/P&gt;
&lt;P&gt;If permanent HW failures occur causing an endless loop there is a severe problem so completely disable the MCU is appropriate as you can assume a recovery is not possible anymore. Customers need to handle this situation themselves as this is application dependent.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Bas&lt;/P&gt;</description>
    <pubDate>Wed, 23 Oct 2024 07:23:01 GMT</pubDate>
    <dc:creator>BasW</dc:creator>
    <dc:date>2024-10-23T07:23:01Z</dc:date>
    <item>
      <title>S32K BIST process problem?</title>
      <link>https://community.nxp.com/t5/SafeAssure-Community/S32K-BIST-process-problem/m-p/1975024#M316</link>
      <description>&lt;P&gt;Hi NXP,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;As shown in the figure: if the return value of Bist_GetExecStatus is always BIST_INTEGRITY_FAIL, the loop will keep going. Is there a problem with designing the BIST process this way?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="li3_0-1729069451782.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/304972i0DF55F2F62A6131D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="li3_0-1729069451782.png" alt="li3_0-1729069451782.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Li 3&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 16 Oct 2024 09:07:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/SafeAssure-Community/S32K-BIST-process-problem/m-p/1975024#M316</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-16T09:07:32Z</dc:date>
    </item>
    <item>
      <title>Re: S32K BIST process problem?</title>
      <link>https://community.nxp.com/t5/SafeAssure-Community/S32K-BIST-process-problem/m-p/1979945#M317</link>
      <description>&lt;P&gt;Hi Li,&lt;/P&gt;
&lt;P&gt;the complete safety concept requires an external PMIC or at least a WDT as pure minimum. The WDT will detect endless loops and reset the part a number of times until it completely disables the MCU. NXP PMICs support this, the number of POR resets can be configured and read after boot. Please consult the RM/SM of the used PMIC.&lt;/P&gt;
&lt;P&gt;If permanent HW failures occur causing an endless loop there is a severe problem so completely disable the MCU is appropriate as you can assume a recovery is not possible anymore. Customers need to handle this situation themselves as this is application dependent.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Bas&lt;/P&gt;</description>
      <pubDate>Wed, 23 Oct 2024 07:23:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/SafeAssure-Community/S32K-BIST-process-problem/m-p/1979945#M317</guid>
      <dc:creator>BasW</dc:creator>
      <dc:date>2024-10-23T07:23:01Z</dc:date>
    </item>
  </channel>
</rss>

