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    <title>topic Re: Writing to sram causes kernel panic in S32 SDK</title>
    <link>https://community.nxp.com/t5/S32-SDK/Writing-to-sram-causes-kernel-panic/m-p/1717123#M3291</link>
    <description>&lt;P&gt;Hi chu tianwei&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope you are doing well&lt;/P&gt;
&lt;P&gt;I think there may reserved memory from 0x34000000. do you have spesific use case of use at 0x34000000 ? . can you try with 0x34100000&lt;/P&gt;
&lt;P&gt;and also use dcache off.&lt;/P&gt;
&lt;P&gt;can you try below&lt;/P&gt;
&lt;P&gt;=&amp;gt; dcache off&lt;/P&gt;
&lt;P&gt;=&amp;gt; mw.b 0x34100000 0 1&lt;/P&gt;
&lt;P&gt;=&amp;gt; boot&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards ,&lt;/P&gt;
&lt;P&gt;Tushar&lt;/P&gt;</description>
    <pubDate>Tue, 05 Sep 2023 10:45:19 GMT</pubDate>
    <dc:creator>nxf92355</dc:creator>
    <dc:date>2023-09-05T10:45:19Z</dc:date>
    <item>
      <title>Writing to sram causes kernel panic</title>
      <link>https://community.nxp.com/t5/S32-SDK/Writing-to-sram-causes-kernel-panic/m-p/1716337#M3285</link>
      <description>&lt;P&gt;resetting ...&lt;BR /&gt;NOTICE: S32 TF-A: s32_system_reNOTICE: Reset status: Destructive Reset (RUN)&lt;BR /&gt;NOTICE: BL2: v2.5(release):&lt;BR /&gt;NOTICE: BL2: Built : 14:12:45, Sep 4 2023&lt;BR /&gt;NOTICE: BL2: Booting BL31&lt;BR /&gt;NOTICE: Entry point address = 0xff800000&lt;BR /&gt;NOTICE: SPSR = 0x3cd&lt;BR /&gt;NOTICE: BL31: v2.5(release):&lt;BR /&gt;NOTICE: BL31: Built : 14:12:52, Sep 4 2023&lt;BR /&gt;NOTICE: Entry point address = 0xffaa0000&lt;BR /&gt;NOTICE: SPSR = 0x3c5&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;U-Boot 2020.04 (Sep 04 2023 - 14:12:25 +0800)&lt;/P&gt;&lt;P&gt;CPU: NXP S32G399A rev. 1.1&lt;BR /&gt;Model: NXP S32G399A-RDB3&lt;BR /&gt;DRAM: 3.5 GiB&lt;BR /&gt;MMC: FSL_SDHC: 0&lt;BR /&gt;Loading Environment from SPI Flash... SF: Detected mx25uw51245g with page size 256 Bytes, erase size 64 KiB, total 64 MiB&lt;BR /&gt;OK&lt;BR /&gt;Using external clock for PCIe0, CRNS&lt;BR /&gt;Frequency 100Mhz configured for PCIe0&lt;BR /&gt;Configuring PCIe0 as SGMII(x2) [XPCS0 1G, XPCS1 1G]&lt;BR /&gt;XPCS0 power-up good failed&lt;BR /&gt;XPCS1 power-up good failed&lt;BR /&gt;XPCS0 pre power-up soft reset failed&lt;BR /&gt;XPCS0 power-up failed&lt;BR /&gt;XPCS1 pre power-up soft reset failed&lt;BR /&gt;XPCS1 power-up failed&lt;BR /&gt;Using external clock for PCIe1, CRNS&lt;BR /&gt;Configuring PCIe1 as RootComplex(x2)&lt;BR /&gt;WARNING: Failed to lock PCIe1 MPLLs&lt;BR /&gt;PCIe0: Not configuring PCIe, PHY not configured&lt;BR /&gt;PCIe1: Not configuring PCIe, PHY not configured&lt;BR /&gt;In: serial@401C8000&lt;BR /&gt;Out: serial@401C8000&lt;BR /&gt;Err: serial@401C8000&lt;BR /&gt;Board revision: Revision Unknown: (0x26a)&lt;BR /&gt;Net: EQOS phy: sgmii @ 14&lt;BR /&gt;ERROR: Failed to change the clock source of mux 1 to 40 (CGM = 0x4053c000)&lt;BR /&gt;ERROR: Failed to enable clock: 10116&lt;BR /&gt;ERROR: Failed to enable 18 clock&lt;BR /&gt;Failed to set GMAC TX frequency&lt;BR /&gt;ERROR: Failed to change the clock source of mux 2 to 41 (CGM = 0x4053c000)&lt;BR /&gt;ERROR: Failed to enable clock: 10117&lt;BR /&gt;ERROR: Failed to enable 17 clock&lt;BR /&gt;Failed to enable rx_sgmii clock&lt;BR /&gt;ERROR: Failed to change the clock source of mux 1 to 40 (CGM = 0x4053c000)&lt;BR /&gt;ERROR: Failed to enable clock: 10116&lt;BR /&gt;ERROR: Failed to enable 18 clock&lt;BR /&gt;Failed to enable tx_sgmii clock&lt;/P&gt;&lt;P&gt;Warning: eth_eqos (eth0) using random MAC address - ce:a6:2c:02:6b:e6&lt;BR /&gt;eth0: eth_eqos&lt;BR /&gt;Hit any key to stop autoboot: 0&lt;BR /&gt;=&amp;gt;&lt;BR /&gt;=&amp;gt;&lt;BR /&gt;=&amp;gt;&lt;BR /&gt;=&amp;gt; mw.b 0x34000000 0 1&lt;BR /&gt;=&amp;gt; boot&lt;BR /&gt;Setting bus to 0&lt;BR /&gt;Booting M7 from flash...&lt;BR /&gt;Booting A53 from flash...&lt;BR /&gt;device 0 offset 0x900000, size 0x100000&lt;BR /&gt;SF: 1048576 bytes @ 0x900000 Read: OK&lt;BR /&gt;device 0 offset 0xa00000, size 0x1600000&lt;BR /&gt;SF: 23068672 bytes @ 0xa00000 Read: OK&lt;BR /&gt;device 0 offset 0x2000000, size 0x2000000&lt;BR /&gt;SF: 33554432 bytes @ 0x2000000 Read: OK&lt;BR /&gt;## Flattened Device Tree blob at 80000000&lt;BR /&gt;Booting using the fdt blob at 0x80000000&lt;BR /&gt;Loading Ramdisk to fc1ff000, end fe1ff000 ... OK&lt;BR /&gt;Loading Device Tree to 00000000ffdbc000, end 00000000ffdc977f ... OK&lt;/P&gt;&lt;P&gt;Starting kernel ...&lt;/P&gt;&lt;P&gt;[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]&lt;BR /&gt;[ 0.000000] Linux version 5.10.90-v1.0.0-rt60 (root@14851fee6bd7) (aarch64-linux-gnu-gcc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0, GNU ld (GNU Binutils for Ubuntu) 2.34) #21 SMP PREEMPT Fri Sep 1 10:55:24 CST 2023&lt;BR /&gt;[ 0.000000] Machine model: Freescale S32G399A&lt;BR /&gt;[ 0.000000] earlycon: linflex0 at MMIO 0x00000000401c8000 (options '115200n8')&lt;BR /&gt;[ 0.000000] printk: bootconsole [linflex0] enabled&lt;BR /&gt;[ 0.000000] SError Interrupt on CPU0, code 0xbf000002 -- SError&lt;BR /&gt;[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.10.90-v1.0.0-rt60 #21&lt;BR /&gt;[ 0.000000] Hardware name: Freescale S32G399A (DT)&lt;BR /&gt;[ 0.000000] pstate: 60000085 (nZCv daIf -PAN -UAO -TCO BTYPE=--)&lt;BR /&gt;[ 0.000000] pc : setup_arch+0x164/0x590&lt;BR /&gt;[ 0.000000] lr : setup_arch+0x15c/0x590&lt;BR /&gt;[ 0.000000] sp : ffffffc010c93ef0&lt;BR /&gt;[ 0.000000] x29: ffffffc010c93ef0 x28: 0000000080d30018&lt;BR /&gt;[ 0.000000] x27: 00000000ffaa50cc x26: 0000000000000000&lt;BR /&gt;[ 0.000000] x25: 00000000ffb1b140 x24: 00000000ffde8f18&lt;BR /&gt;[ 0.000000] x23: ffffffc010d35000 x22: ffffffc010c9e300&lt;BR /&gt;[ 0.000000] x21: fffffffefe7bc08c x20: ffffffc010ce6f88&lt;BR /&gt;[ 0.000000] x19: ffffffc010000000 x18: 0000000000000010&lt;BR /&gt;[ 0.000000] x17: 0000000000001400 x16: 0000000000001c00&lt;BR /&gt;[ 0.000000] x15: ffffffc010c9e768 x14: ffffffffffffffff&lt;BR /&gt;[ 0.000000] x13: 0000000000000000 x12: 0000000000000008&lt;BR /&gt;[ 0.000000] x11: 0000000000000007 x10: 0101010101010101&lt;BR /&gt;[ 0.000000] x9 : ffffffffffffffff x8 : 0000000000000008&lt;BR /&gt;[ 0.000000] x7 : 0000000000000007 x6 : 0080000000000080&lt;BR /&gt;[ 0.000000] x5 : 8000000000008000 x4 : 0000000000000042&lt;BR /&gt;[ 0.000000] x3 : 0000000000000063 x2 : 0000000000000042&lt;BR /&gt;[ 0.000000] x1 : 0000000000000000 x0 : 0000000000000080&lt;BR /&gt;[ 0.000000] Kernel panic - not syncing:&lt;BR /&gt;[ 0.000000] Asynchronous SError Interrupt&lt;BR /&gt;[ 0.000000] ---[ end Kernel panic - not syncing: Asynchronous SError Interrupt ]---&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;After I wrote 0 in the 34000000 address in uboot, panic occurred when starting kernel.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I am using BSP32&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 04 Sep 2023 08:22:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/Writing-to-sram-causes-kernel-panic/m-p/1716337#M3285</guid>
      <dc:creator>tianwei</dc:creator>
      <dc:date>2023-09-04T08:22:30Z</dc:date>
    </item>
    <item>
      <title>Re: Writing to sram causes kernel panic</title>
      <link>https://community.nxp.com/t5/S32-SDK/Writing-to-sram-causes-kernel-panic/m-p/1717123#M3291</link>
      <description>&lt;P&gt;Hi chu tianwei&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope you are doing well&lt;/P&gt;
&lt;P&gt;I think there may reserved memory from 0x34000000. do you have spesific use case of use at 0x34000000 ? . can you try with 0x34100000&lt;/P&gt;
&lt;P&gt;and also use dcache off.&lt;/P&gt;
&lt;P&gt;can you try below&lt;/P&gt;
&lt;P&gt;=&amp;gt; dcache off&lt;/P&gt;
&lt;P&gt;=&amp;gt; mw.b 0x34100000 0 1&lt;/P&gt;
&lt;P&gt;=&amp;gt; boot&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards ,&lt;/P&gt;
&lt;P&gt;Tushar&lt;/P&gt;</description>
      <pubDate>Tue, 05 Sep 2023 10:45:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/Writing-to-sram-causes-kernel-panic/m-p/1717123#M3291</guid>
      <dc:creator>nxf92355</dc:creator>
      <dc:date>2023-09-05T10:45:19Z</dc:date>
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