<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: FLS driver: write data to flash section unsuccessfully in S32 SDK</title>
    <link>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565093#M2830</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;This is probably caused by the Cache that is enabled by the MPU in the startup code.&lt;/P&gt;
&lt;P&gt;In other words, you probably read the Cache and not the PFlash.&lt;/P&gt;
&lt;P&gt;Try disabling the Cache in the MPU, &lt;STRONG&gt;system.c&lt;/STRONG&gt; file.&lt;/P&gt;
&lt;P&gt;Change rasr[2]=0x060&lt;STRONG&gt;B&lt;/STRONG&gt;002BUL&amp;nbsp; to rasr[2] = 0x060&lt;STRONG&gt;8&lt;/STRONG&gt;002BUL&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 07 Dec 2022 08:59:29 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2022-12-07T08:59:29Z</dc:date>
    <item>
      <title>FLS driver: write data to flash section unsuccessfully</title>
      <link>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1564299#M2828</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm studying the FLS example of&amp;nbsp;RTD2.0.1&amp;nbsp; with S32DS V3.5, and there is a problem that the data couldn't&amp;nbsp; be wrote in time, I have to restart device via S32DS , then the data is right and write successfully.&lt;/P&gt;&lt;P&gt;I'd like to know what's the reason.&lt;/P&gt;&lt;P&gt;Here is my FLS example project.&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;</description>
      <pubDate>Mon, 05 Dec 2022 10:17:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1564299#M2828</guid>
      <dc:creator>zp001</dc:creator>
      <dc:date>2022-12-05T10:17:45Z</dc:date>
    </item>
    <item>
      <title>Re: FLS driver: write data to flash section unsuccessfully</title>
      <link>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565093#M2830</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;This is probably caused by the Cache that is enabled by the MPU in the startup code.&lt;/P&gt;
&lt;P&gt;In other words, you probably read the Cache and not the PFlash.&lt;/P&gt;
&lt;P&gt;Try disabling the Cache in the MPU, &lt;STRONG&gt;system.c&lt;/STRONG&gt; file.&lt;/P&gt;
&lt;P&gt;Change rasr[2]=0x060&lt;STRONG&gt;B&lt;/STRONG&gt;002BUL&amp;nbsp; to rasr[2] = 0x060&lt;STRONG&gt;8&lt;/STRONG&gt;002BUL&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Dec 2022 08:59:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565093#M2830</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2022-12-07T08:59:29Z</dc:date>
    </item>
    <item>
      <title>Re: FLS driver: write data to flash section unsuccessfully</title>
      <link>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565500#M2836</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Daniel,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your reply!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I just verified the solutiion, the sample code run normally.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;I'd like to know if disable Cache in the MPU, what's the scope of influence and why the official FLS sample doesn't disable Cache in the startup phase.&lt;/P&gt;</description>
      <pubDate>Wed, 07 Dec 2022 01:49:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565500#M2836</guid>
      <dc:creator>zp001</dc:creator>
      <dc:date>2022-12-07T01:49:06Z</dc:date>
    </item>
    <item>
      <title>Re: FLS driver: write data to flash section unsuccessfully</title>
      <link>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565784#M2839</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/194763"&gt;@zp001&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The cache is a topic on its own.&lt;/P&gt;
&lt;P&gt;But basically, if the cache is disabled, the core will need to read the flash instead of the cache, and that is slower.&lt;/P&gt;
&lt;P&gt;The cache can be invalidated by address after each write to the flash.&lt;/P&gt;
&lt;P&gt;There is this API of the low-level Cache_Ip driver.&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;Cache_Ip_InvalidateByAddr();&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;So, you can keep the cache enabled, but invalidate the part of it that has been reprogrammed.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Dec 2022 08:58:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/FLS-driver-write-data-to-flash-section-unsuccessfully/m-p/1565784#M2839</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2022-12-07T08:58:10Z</dc:date>
    </item>
  </channel>
</rss>

