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    <title>topic Re: How do we generate the ECC interrupts? in S32 SDK</title>
    <link>https://community.nxp.com/t5/S32-SDK/How-do-we-generate-the-ECC-interrupts/m-p/1008333#M1408</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;Sandip,&lt;/P&gt;&lt;P&gt;Please refer to the erm_report_s32k142 SDK example.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;BR, Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 20 Nov 2019 15:41:30 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2019-11-20T15:41:30Z</dc:date>
    <item>
      <title>How do we generate the ECC interrupts?</title>
      <link>https://community.nxp.com/t5/S32-SDK/How-do-we-generate-the-ECC-interrupts/m-p/1008332#M1407</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;Hello Team,&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;We need to hits the ECC interrupts for single fault and double fault bits.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Target MCU - S32K142&lt;BR /&gt;S32DS Version - 2.0&lt;BR /&gt;SDK version - 0.8.4&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;erm1_interrupt0 and erm1_Interrupt1 are configured as Single correction and Non-correctable error interrupt enabled in &lt;SPAN style="display: inline !important; float: none; background-color: #ffffff; color: #3d3d3d; font-family: Helvetica Neue,Helvetica,Arial,Lucida Grande,sans-serif; font-size: 15px; font-style: normal; font-variant: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: left; text-decoration: none; text-indent: 0px; text-transform: none; -webkit-text-stroke-width: 0px; white-space: normal; word-spacing: 0px;"&gt;erm1_InitConfig0&lt;/SPAN&gt;[0].&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Below are the code for reference.&lt;/DIV&gt;&lt;DIV&gt;/*ECC check enable - Error reporting manager to detect data range failures */&lt;BR /&gt;ERM_DRV_Init(INST_ERM1, ERM_CHANNEL_COUNT0, &amp;amp;erm1_InitConfig0[0]);&lt;BR /&gt;INT_SYS_InstallHandler(ERM_single_fault_IRQn, &amp;amp;ErmErrorIntCh_0_1, (isr_t *)0);&lt;BR /&gt;INT_SYS_InstallHandler(ERM_double_fault_IRQn, &amp;amp;ErmErrorIntCh_0_1, (isr_t *)0);&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;INT_SYS_EnableIRQ(ERM_single_fault_IRQn);&lt;BR /&gt;INT_SYS_EnableIRQ(ERM_double_fault_IRQn);&lt;BR /&gt;&amp;nbsp;&lt;BR /&gt;For testing, How do we generate the interrupts?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thank you.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;BR /&gt;Sandip&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Nov 2019 20:22:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/How-do-we-generate-the-ECC-interrupts/m-p/1008332#M1407</guid>
      <dc:creator>sardalkar</dc:creator>
      <dc:date>2019-11-18T20:22:34Z</dc:date>
    </item>
    <item>
      <title>Re: How do we generate the ECC interrupts?</title>
      <link>https://community.nxp.com/t5/S32-SDK/How-do-we-generate-the-ECC-interrupts/m-p/1008333#M1408</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;Sandip,&lt;/P&gt;&lt;P&gt;Please refer to the erm_report_s32k142 SDK example.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;BR, Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Nov 2019 15:41:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-SDK/How-do-we-generate-the-ECC-interrupts/m-p/1008333#M1408</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2019-11-20T15:41:30Z</dc:date>
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