<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32 Design StudioのトピックS32R45 Evaluation Board External DRAM Initialization</title>
    <link>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1468512#M8642</link>
    <description>&lt;P&gt;S32R45 Evaluation Board has an external DRAM and it should be initialized in M7 bootloader&lt;/P&gt;&lt;P&gt;DDR tool in S32DS has been used to generate ddr-related code and kept the default configuration.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssong_0-1654229069513.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182153i6D860A4E7498FA85/image-size/large?v=v2&amp;amp;px=999" role="button" title="ssong_0-1654229069513.png" alt="ssong_0-1654229069513.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;ddr_init() function was located in SysDal_InitBlockOne. There is a struct which is accessed by ddr_init's subfunction. but 0x4007C604, 0x4007C608 doesn't seem to be right position in S32R45 so that we can't access the below registers which starts from 0x403C0000(UMCTL2_REGS BASE_ADDRESS)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssong_1-1654229326976.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182154iBD2FA7F6021939B7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ssong_1-1654229326976.png" alt="ssong_1-1654229326976.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Could you guide us to resolve this?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 03 Jun 2022 04:14:40 GMT</pubDate>
    <dc:creator>ssong</dc:creator>
    <dc:date>2022-06-03T04:14:40Z</dc:date>
    <item>
      <title>S32R45 Evaluation Board External DRAM Initialization</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1468512#M8642</link>
      <description>&lt;P&gt;S32R45 Evaluation Board has an external DRAM and it should be initialized in M7 bootloader&lt;/P&gt;&lt;P&gt;DDR tool in S32DS has been used to generate ddr-related code and kept the default configuration.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssong_0-1654229069513.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182153i6D860A4E7498FA85/image-size/large?v=v2&amp;amp;px=999" role="button" title="ssong_0-1654229069513.png" alt="ssong_0-1654229069513.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;ddr_init() function was located in SysDal_InitBlockOne. There is a struct which is accessed by ddr_init's subfunction. but 0x4007C604, 0x4007C608 doesn't seem to be right position in S32R45 so that we can't access the below registers which starts from 0x403C0000(UMCTL2_REGS BASE_ADDRESS)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssong_1-1654229326976.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/182154iBD2FA7F6021939B7/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ssong_1-1654229326976.png" alt="ssong_1-1654229326976.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Could you guide us to resolve this?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 03 Jun 2022 04:14:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1468512#M8642</guid>
      <dc:creator>ssong</dc:creator>
      <dc:date>2022-06-03T04:14:40Z</dc:date>
    </item>
    <item>
      <title>Re: S32R45 Evaluation Board External DRAM Initialization</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1468519#M8643</link>
      <description>&lt;P&gt;If you have an example project for external dram initialization, It could be the best.&lt;/P&gt;</description>
      <pubDate>Fri, 03 Jun 2022 04:40:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1468519#M8643</guid>
      <dc:creator>ssong</dc:creator>
      <dc:date>2022-06-03T04:40:04Z</dc:date>
    </item>
    <item>
      <title>Re: S32R45 Evaluation Board External DRAM Initialization</title>
      <link>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1469913#M8665</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;This looks like a platform setup issue.&lt;/P&gt;
&lt;P&gt;I will check who can handle this query.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Tue, 07 Jun 2022 09:52:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32-Design-Studio/S32R45-Evaluation-Board-External-DRAM-Initialization/m-p/1469913#M8665</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2022-06-07T09:52:39Z</dc:date>
    </item>
  </channel>
</rss>

